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公开(公告)号：US11784567B2
公开(公告)日：2023-10-10
申请号：US17571741
申请日：2022-01-10
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet
Abstract: In an embodiment, a device includes a switching power supply configured to have a first operating mode synchronized by a first clock signal generated by a clock generator a second asynchronous operating mode. The clock generator is configured such that the first clock signal becomes equal, upon transition from the second operating mode to the first operating mode, to the signal having the closest rising edge of a second clock signal and a third clock signal complementary to the second clock signal.
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公开(公告)号：US20220376622A1
公开(公告)日：2022-11-24
申请号：US17731000
申请日：2022-04-27
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet
IPC: H02M3/158
Abstract: In an embodiment a switching power supply includes a voltage ramp generator comprising at least one output capacitor, wherein the generator is configured such that the output capacitor has a first value during a first operating cycle of a first operating mode and a second value during subsequent operating cycles of the first operating mode.
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公开(公告)号：US20220038003A1
公开(公告)日：2022-02-03
申请号：US17370609
申请日：2021-07-08
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Didier Davino
Abstract: An embodiment electronic device includes a first circuit including first and second transistors series-coupled between a node of application of a power supply voltage and a node of application of a reference voltage, the first and second transistors being coupled to each other by a first node, and a second circuit, configured to compare a first voltage on the first node with first and second voltage thresholds.
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公开(公告)号：US20220038001A1
公开(公告)日：2022-02-03
申请号：US17366353
申请日：2021-07-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Olivier Lauzier
Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator including first and second inputs. The first input is configured to receive, during a first phase, a first voltage ramp and, during a second phase, a set point voltage. The second input is configured to receive, during the first phase, the set point voltage and, during the second phase, a second voltage ramp.
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15.发明申请公开(公告)号：US20190245377A1
公开(公告)日：2019-08-08
申请号：US16267968
申请日：2019-02-05
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Laurent Truphemus , Sebastien Ortet
CPC classification number: H02J9/005 , G06F1/263 , G06F1/30 , G11C5/14 , G11C5/141 , G11C11/40 , G11C11/4074 , G11C16/30
Abstract: An integrated circuit includes: a primary supply stage including a primary supply node, the primary supply stage being configured to deliver a primary supply voltage to the primary supply node; a secondary supply stage including a secondary supply node, the secondary supply stage being configured to deliver a secondary supply voltage to the secondary supply node; a supply-switching circuit; a pre-charging circuit controllably coupled to the secondary supply node via the supply-switching circuit; and a volatile memory circuit controllably coupled to the primary supply node and the secondary supply node via the supply-switching circuit, wherein the switching circuit is configured to connect a supply of the volatile memory circuit either to the primary supply node in a primary supply mode, or to the secondary supply node in a secondary supply mode.
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Patent Agency Ranking
公开(公告)号：US12199511B2
公开(公告)日：2025-01-14
申请号：US17680022
申请日：2022-02-24
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Didier Davino , Remi Collette
Abstract: In an embodiment, a voltage converter is configured to operate by a succession of operating cycles, each cycle comprising an energy accumulation phase and an energy restitution phase, wherein the converter is further configured to determine a duration of one of the phases by comparing a voltage ramp and a first reference voltage, and wherein a slope of the voltage ramp depends on a sign of a current in an inductor at an end of a previous operating cycle.
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17.发明授权公开(公告)号：US11670956B2
公开(公告)日：2023-06-06
申请号：US17459465
申请日：2021-08-27
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Laurent Truphemus , Sebastien Ortet
CPC classification number: H02J9/005 , G06F1/263 , G06F1/30 , G11C5/141 , G11C11/4074 , G11C16/30 , G11C5/14 , G11C11/40
Abstract: An integrated circuit includes: a primary supply stage including a primary supply node, the primary supply stage being configured to deliver a primary supply voltage to the primary supply node; a secondary supply stage including a secondary supply node, the secondary supply stage being configured to deliver a secondary supply voltage to the secondary supply node; a supply-switching circuit; a pre-charging circuit controllably coupled to the secondary supply node via the supply-switching circuit; and a volatile memory circuit controllably coupled to the primary supply node and the secondary supply node via the supply-switching circuit, wherein the switching circuit is configured to connect a supply of the volatile memory circuit either to the primary supply node in a primary supply mode, or to the secondary supply node in a secondary supply mode.
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18.发明授权公开(公告)号：US11539295B2
公开(公告)日：2022-12-27
申请号：US17089213
申请日：2020-11-04
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Didier Davino , Cedric Thomas
Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.
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公开(公告)号：US20220321009A1
公开(公告)日：2022-10-06
申请号：US17680022
申请日：2022-02-24
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Didier Davino , Remi Collette
Abstract: In an embodiment, a voltage converter is configured to operate by a succession of operating cycles, each cycle comprising an energy accumulation phase and an energy restitution phase, wherein the converter is further configured to determine a duration of one of the phases by comparing a voltage ramp and a first reference voltage, and wherein a slope of the voltage ramp depends on a sign of a current in an inductor at an end of a previous operating cycle.
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公开(公告)号：US11456661B2
公开(公告)日：2022-09-27
申请号：US16930535
申请日：2020-07-16
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Sebastien Ortet , Cedric Thomas
Abstract: The process for starting a power supply circuit which includes a switched-mode power supply is performed using: a first phase during which, if an output voltage of the switched-mode power supply is lower than a first voltage, the switched-mode power supply operates in pulse width modulation mode to increase its output voltage up to said first voltage; and when the output voltage has reached the first voltage, a second phase during which the switched-mode power supply operates in a bypass mode.
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