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    Error detection
    12.
    发明授权
    Error detection 有权

    公开(公告)号：US11640844B2

    公开(公告)日：2023-05-02

    申请号：US17010400

    申请日：2020-09-02

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Fabrice Romain ,  Mathieu Lisart

    IPC: G11C29/44 ,  G11C29/14 ,  G11C29/42

    Abstract: A method for detecting a writing error of a datum in memory includes: storing at least two parts of equal size of a binary word representative of said datum at the same address in at least two identical memory circuits, and comparing internal control signals of the two memory circuits to determine existence of the writing error.

    Mechanism for verifying the authenticity of a product
    13.
    发明授权
    Mechanism for verifying the authenticity of a product 有权

    公开(公告)号：US10540663B2

    公开(公告)日：2020-01-21

    申请号：US15900362

    申请日：2018-02-20

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Denis Farison ,  Fabrice Romain ,  Christophe Laurencin

    IPC: G06F21/00 ,  G06Q30/00 ,  G06F21/44

    Abstract: The authenticity of a product associated with a host device is verified through a process. The product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The process involves, in a first phase, the sending by the host device of a control signal for executing a function, with the product functioning to decipher the function and store the unciphered function in the non-volatile memory. The process further involves, in a second phase, the sending by the host device of a control signal for causing execution of the deciphered function, with the product functioning to execute the function and send a result of this execution back to the host device. The host device evaluates the received result to verify product authenticity.

    METHOD FOR VERIFYING THE AUTHENTICITY OF A PRODUCT
    14.
    发明申请
    METHOD FOR VERIFYING THE AUTHENTICITY OF A PRODUCT 有权
    验证产品认证的方法

    公开(公告)号：US20140367465A1

    公开(公告)日：2014-12-18

    申请号：US14305129

    申请日：2014-06-16

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Denis Farison ,  Fabrice Romain ,  Christophe Laurencin

    IPC: G06Q30/00

    CPC classification number: G06Q30/018 ,  G06F21/44 ,  G06F21/73

    Abstract: In order to verify the authenticity of a product associated with a host device, the product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The host device sends a control signal for selecting and activating one of those ciphered functions. The product then deciphers and executes the function. The result of the function execution is then communicated back to host device when a decision on product authenticity is made.

    Abstract translation: 为了验证与主机设备相关联的产品的真实性，产品在非易失性存储器的段中包含以加密方式存储的若干不同功能。 主机设备发送用于选择和激活这些加密功能之一的控制信号。 然后产品解密并执行该功能。 当做出关于产品真实性的决定时，功能执行的结果然后被传送回主机设备。

    Memory access control and verification using address aliasing and markers
    16.
    发明授权
    Memory access control and verification using address aliasing and markers 有权

    公开(公告)号：US10783091B2

    公开(公告)日：2020-09-22

    申请号：US16130858

    申请日：2018-09-13

    Applicant: STMICROELECTRONICS (ROUSSET) SAS

    Inventor： Fabrice Romain

    IPC: G06F12/14 ,  G06F11/00

    Abstract: The present disclosure concerns a memory access control system comprising: a processing device capable of operating in a plurality of operating modes, and of accessing a memory using a plurality of address aliases; and a verification circuit configured: to receive, in relation with a first read operation of a first memory location in the memory, an indication of a first of said plurality of address aliases associated with the first read operation; to verify that a current operating mode of the processing device permits the processing device to access the memory using the first address alias; to receive, during the first read operation, a first marker stored at the first memory location; and to verify, based on the first marker and on the first address alias, that the processing device is permitted to access the first memory location.

    MECHANISM FOR VERIFYING THE AUTHENTICITY OF A PRODUCT
    17.
    发明申请
    MECHANISM FOR VERIFYING THE AUTHENTICITY OF A PRODUCT 有权
    验证产品认证的机制

    公开(公告)号：US20140372327A1

    公开(公告)日：2014-12-18

    申请号：US14305070

    申请日：2014-06-16

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Denis Farison ,  Fabrice Romain ,  Christophe Laurencin

    IPC: G06Q30/00

    CPC classification number: G06Q30/018 ,  G06F3/12 ,  G06F21/44 ,  G06F21/608 ,  G06F21/73

    Abstract: The authenticity of a product associated with a host device is verified through a process. The product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The process involves, in a first phase, the sending by the host device of a control signal for executing a function, with the product functioning to decipher the function and store the unciphered function in the non-volatile memory. The process further involves, in a second phase, the sending by the host device of a control signal for causing execution of the deciphered function, with the product functioning to execute the function and send a result of this execution back to the host device. The host device evaluates the received result to verify product authenticity.

    Abstract translation: 通过一个过程验证与主机设备相关联的产品的真实性。 该产品在非易失性存储器的段中包含以加密方式存储的若干不同功能。 该过程在第一阶段涉及由主机设备发送用于执行功能的控制信号，其中产品用于解密功能并将未加密功能存储在非易失性存储器中。 该过程还包括在第二阶段中由主机设备发送用于执行解密功能的控制信号，其中产品用于执行功能并将该执行的结果发送回主机设备。 主机设备评估接收到的结果以验证产品的真实性。

    Error detection
    19.
    发明授权
    Error detection 有权

    公开(公告)号：US11742050B2

    公开(公告)日：2023-08-29

    申请号：US17839168

    申请日：2022-06-13

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Fabrice Romain ,  Mathieu Lisart

    IPC: G11C29/44 ,  G11C29/14 ,  G11C29/42

    CPC classification number: G11C29/44 ,  G11C29/14 ,  G11C29/42 ,  G11C2029/4402

    Abstract: A method for detecting a reading error of a datum in memory. A binary word which is representative of the datum and an error correcting or detecting code is read by: reading a first part of the binary word stored at a first address in a first memory circuit; and reading a second part of the binary word stored at a second address in a second memory circuit. The first and second parts read from the first and second memory circuits, respectively, are concatenated to form a read binary word. The datum is then obtained by removing the error correcting or detecting code from the read binary word. A new error correcting or detecting code is calculated from the obtained datum and compared to the removed error correcting or detecting code to detect error in the obtained datum.

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