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公开(公告)号：US10193581B2
公开(公告)日：2019-01-29
申请号：US15468306
申请日：2017-03-24
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Spina , Alessandro Parisi , Pierpaolo Lombardo , Nunzio Greco , Giuseppe Palmisano
Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.
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公开(公告)号：US09978511B2
公开(公告)日：2018-05-22
申请号：US15163430
申请日：2016-05-24
Applicant: STMicroelectronics S.r.l.
Inventor： Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano , Nunzio Greco
CPC classification number: H01F38/14 , H01F2038/143 , H01F2038/146 , H01L23/66 , H01L24/06 , H02J50/12 , H02M7/06 , H03B15/00 , H04B5/0037 , H04L25/0266
Abstract: A galvanic isolation system includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network.
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公开(公告)号：US09673754B2
公开(公告)日：2017-06-06
申请号：US15058223
申请日：2016-03-02
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Vincenzo Fiore , Nunzio Spina , Giuseppe Palmisano
CPC classification number: H03B5/1212 , H03B1/02 , H03B5/02 , H03B5/1215 , H03B5/1228 , H03B5/1296 , H03B27/00 , H03B2200/0074 , H03B2200/0076 , H03B2200/0078
Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
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公开(公告)号：US09520828B2
公开(公告)日：2016-12-13
申请号：US14942200
申请日：2015-11-16
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Vincenzo Fiore , Nunzio Spina , Giuseppe Palmisano
CPC classification number: H03B5/1212 , H03B1/02 , H03B5/02 , H03B5/1215 , H03B5/1228 , H03B5/1296 , H03B27/00 , H03B2200/0074 , H03B2200/0076 , H03B2200/0078
Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
Abstract translation: 振荡器电路包括在电源电压节点和参考电压节点之间以串联配置布置的第一和第二振荡器。 第一和第二振荡器被配置为接收用于控制频率和相位同步的同步信号。 提供用于耦合第一和第二振荡器的电磁网络包括具有初级电路和次级电路的变压器。 主电路包括耦合到第一振荡器的第一部分和耦合到第二振荡器的第二部分。 第一和第二部分由用于在第一和第二振荡器之间重新使用电流的电路元件连接。 振荡器电路被制造为集成电路器件，其中电磁网络形成在器件的金属化层中。 次级电路产生从主电路的第一和第二部分提供的输出功率组合功率。
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公开(公告)号：US11750234B2
公开(公告)日：2023-09-05
申请号：US17457496
申请日：2021-12-03
Applicant: STMicroelectronics S.r.l.
Inventor： Nunzio Spina , Giuseppe Palmisano , Alessandro Castorina
CPC classification number: H04B1/16 , H03F3/19 , H03F3/245 , H04L27/06 , H03F2200/451
Abstract: A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelop detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.
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Patent Agency Ranking
公开(公告)号：US11611280B2
公开(公告)日：2023-03-21
申请号：US17404382
申请日：2021-08-17
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Parisi , Nunzio Greco , Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano
IPC: H02M3/335 , H02M1/08 , H04L27/08 , H01F19/08 , H01F27/28 , H03B5/12 , H02M3/338 , H02M3/337 , H02M3/00
Abstract: A DC-DC converter includes: an transformer having a primary winding and a secondary winding magnetically coupled to the primary winding; a power oscillator applying an oscillating signal to the primary to transmit a power signal to the secondary winding; a rectifier connected to the secondary winding of the transformer to obtain an output DC voltage by rectification of the power signal; comparison circuitry to generate an error signal representing a difference between the output DC voltage and a reference voltage; a transmitter connected to the secondary winding of the transformer to apply an amplitude modulation to the power signal at the secondary winding of the transformer in response to the error signal to thereby produce an amplitude modulated signal at the primary winding; and a receiver and control circuit connected to the primary winding to control an amplitude of the oscillating signal as a function of the amplitude modulated signal.
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公开(公告)号：US11128221B2
公开(公告)日：2021-09-21
申请号：US16748328
申请日：2020-01-21
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Parisi , Nunzio Greco , Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano
Abstract: A DC-DC converter includes a transformer having primary and secondary windings, a power oscillator applying an oscillating signal to the primary winding to transmit a power signal to the secondary winding, a rectifier obtaining an output DC voltage by rectifying the power signal at the secondary winding, and comparison circuitry generating an error signal representing a difference between the output DC voltage and a reference voltage value. A transmitter connected to the secondary winding performs an amplitude modulation of the power signal at the secondary winding to transmit an amplitude modulated power signal to the primary winding, the amplitude modulation based upon the error signal and modulating a stream of data to the primary winding. A receiver coupled to the primary winding demodulates the amplitude modulated power signal to recover the error signal and the stream of data. An amplitude of the oscillating signal is controlled by the error signal.
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公开(公告)号：US20180198372A1
公开(公告)日：2018-07-12
申请号：US15914257
申请日：2018-03-07
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Spina , Pierpaolo Lombardo , Nunzio Greco , Alessandro Parisi , Giuseppe Palmisano
IPC: H02M3/335
CPC classification number: H02M3/33553 , H01L2224/48137 , H02M3/33523 , H02M3/33584 , H02M3/33592 , H02M2001/0012 , Y02B70/1475
Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
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公开(公告)号：US20180062678A1
公开(公告)日：2018-03-01
申请号：US15468306
申请日：2017-03-24
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Spina , Alessandro Parisi , Pierpaolo Lombardo , Nunzio Greco , Giuseppe Palmisano
CPC classification number: H04B1/10 , H01F19/04 , H01F2019/085 , H03F3/45183 , H03F3/45632 , H03F2203/45084 , H03F2203/45621 , H03F2203/45642 , H03F2203/45704 , H04L25/02 , H04L25/0266 , H04L25/0272
Abstract: A galvanic isolation circuit is formed by a differential transformer having primary and secondary windings for transmission of signals over a carrier between the primary and the secondary windings of the transformer. A galvanic isolation oxide layer is provide between the primary and secondary windings. Each winding includes include a center tap providing a low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer. A pass-band stage is coupled to the secondary winding of the transformer and configured to permit propagation of signals over said carrier through the pass-band amplifier stage while providing for a rejection of common-mode noise.
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公开(公告)号：US20170358993A1
公开(公告)日：2017-12-14
申请号：US15178822
申请日：2016-06-10
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Spina , Pierpaolo Lombardo , Nunzio Greco , Alessandro Parisi , Giuseppe Palmisano
IPC: H02M3/335
CPC classification number: H02M3/33553 , H01L2224/48137 , H02M3/33523 , H02M3/33584 , H02M2001/0012
Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
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