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公开(公告)号：US09948193B2
公开(公告)日：2018-04-17
申请号：US15178822
申请日：2016-06-10
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Spina , Pierpaolo Lombardo , Nunzio Greco , Alessandro Parisi , Giuseppe Palmisano
IPC: H02M3/335
CPC classification number: H02M3/33553 , H01L2224/48137 , H02M3/33523 , H02M3/33584 , H02M2001/0012
Abstract: A galvanic isolation is provided between a first circuit and a second circuit. A first galvanically isolated link is configured to transfer power from a first circuit to a second circuit across the galvanic isolation. A second galvanically isolated link is configured to feed back an error signal from the second circuit to the first circuit across the galvanic isolation for use in regulating the power transfer and further configured to support bidirectional data communication between the first and second circuits across the galvanic isolation.
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2.发明申请公开(公告)号：US20160072435A1
公开(公告)日：2016-03-10
申请号：US14942200
申请日：2015-11-16
Applicant: STMicroelectronics S.r.l.
Inventor： Giuseppe Palmisano , Nunzio Spina , Egidio Ragonese , Vincenzo Fiore
IPC: H03B5/12
CPC classification number: H03B5/1212 , H03B1/02 , H03B5/02 , H03B5/1215 , H03B5/1228 , H03B5/1296 , H03B27/00 , H03B2200/0074 , H03B2200/0076 , H03B2200/0078
Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
Abstract translation: 振荡器电路包括在电源电压节点和参考电压节点之间以串联配置布置的第一和第二振荡器。 第一和第二振荡器被配置为接收用于控制频率和相位同步的同步信号。 提供用于耦合第一和第二振荡器的电磁网络包括具有初级电路和次级电路的变压器。 主电路包括耦合到第一振荡器的第一部分和耦合到第二振荡器的第二部分。 第一和第二部分由用于在第一和第二振荡器之间重新使用电流的电路元件连接。 振荡器电路被制造为集成电路器件，其中电磁网络形成在器件的金属化层中。 次级电路产生从主电路的第一和第二部分提供的输出功率组合功率。
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公开(公告)号：US08792845B2
公开(公告)日：2014-07-29
申请号：US13903679
申请日：2013-05-28
Applicant: STMicroelectronics S.r.l.
Inventor： Giuseppina Sapone , Alessandro Italia , Egidio Ragonese , Giuseppe Palmisano
CPC classification number: H03B5/1231 , H03B5/1218 , H03B5/1243 , H03B5/1296 , H03L7/099 , H04B1/26
Abstract: An oscillator is described, comprising at least one transistor having a first terminal connected to a power supply voltage. The oscillator comprises at least one inductive element connected to a second terminal of the transistor and to a bias voltage and at least one capacitive element coupled between a third terminal of the transistor and ground. The oscillator further comprises means to collect the output signal of the oscillator on the second terminal of the transistor. The oscillator is of the millimeter wave type, i.e., both the inductive element and the capacitive element are sized such that the oscillation frequency is between 30 and 300 gigahertz.
Abstract translation: 描述了一种振荡器，其包括至少一个具有连接到电源电压的第一端子的晶体管。 振荡器包括连接到晶体管的第二端子和偏置电压的至少一个感应元件以及耦合在晶体管的第三端子与地之间的至少一个电容元件。 振荡器还包括在晶体管的第二端子处收集振荡器的输出信号的装置。 振荡器是毫米波型的，即感应元件和电容元件的尺寸使得振荡频率在30和300千兆赫之间。
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公开(公告)号：US11901863B2
公开(公告)日：2024-02-13
申请号：US18177533
申请日：2023-03-02
Inventor： Simone Spataro , Salvatore Coffa , Egidio Ragonese
IPC: H03B5/12 , H03K3/011 , H03K3/0231
CPC classification number: H03B5/1228 , H03B5/1253 , H03K3/011 , H03K3/0231 , H03B2200/0062
Abstract: An oscillator circuit includes a total of N (N≥2) class-D oscillator circuits stacked together between a supply voltage node and a reference voltage node. The output ports of adjacent class-D oscillator circuits in the disclosed oscillator circuit are coupled together by capacitors to ensure frequency and phase synchronization for the frequency signals generated by the class-D oscillator circuits. Compared with a reference oscillator circuit formed of a single class-D oscillator circuit, the oscillation amplitude of each of the class-D oscillator circuits in the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit, and the current consumption of the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit.
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公开(公告)号：US11621670B1
公开(公告)日：2023-04-04
申请号：US17732026
申请日：2022-04-28
Inventor： Simone Spataro , Salvatore Coffa , Egidio Ragonese
IPC: H03B5/12 , H03K3/0231 , H03K3/011
Abstract: An oscillator circuit includes a total of N (N≥2) class-D oscillator circuits stacked together between a supply voltage node and a reference voltage node. The output ports of adjacent class-D oscillator circuits in the disclosed oscillator circuit are coupled together by capacitors to ensure frequency and phase synchronization for the frequency signals generated by the class-D oscillator circuits. Compared with a reference oscillator circuit formed of a single class-D oscillator circuit, the oscillation amplitude of each of the class-D oscillator circuits in the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit, and the current consumption of the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit.
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Patent Agency Ranking
公开(公告)号：US11442142B2
公开(公告)日：2022-09-13
申请号：US16795977
申请日：2020-02-20
Applicant: STMicroelectronics S.r.l.
Inventor： Giuseppe Papotto , Egidio Ragonese , Claudio Nocera , Alessandro Finocchiaro , Giuseppe Palmisano
Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.
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公开(公告)号：US12095423B2
公开(公告)日：2024-09-17
申请号：US17704919
申请日：2022-03-25
Applicant: STMicroelectronics S.r.l.
Inventor： Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano
CPC classification number: H03F1/0233 , H03F3/19 , H04B1/40 , H03F2200/105 , H03F2200/451
Abstract: A rectifier stage includes a differential input transistor pair coupled between a reference voltage node and an intermediate node, and a load circuit coupled between the intermediate node and a supply voltage node. The differential input transistor pair receives a radio-frequency amplitude modulated signal. A rectified signal indicative of an envelope of the radio-frequency amplitude modulated signal is produced at the intermediate node. An amplifier stage coupled to the intermediate node produces an amplified rectified signal at an output node that is indicative of the envelope of the radio-frequency amplitude modulated signal. The rectifier stage includes a resistive element coupled between the intermediate node and the supply voltage node in parallel to the load circuit.
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8.发明申请公开(公告)号：US20190222126A1
公开(公告)日：2019-07-18
申请号：US16244272
申请日：2019-01-10
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Parisi , Nunzio Greco , Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano
CPC classification number: H02M3/33523 , H01F19/08 , H01F27/2804 , H01F2019/085 , H02M1/08 , H02M3/33507 , H02M3/33515 , H02M3/33592 , H02M3/337 , H02M3/338 , H03B5/1215 , H03B5/1228 , H04L27/08
Abstract: A DC-DC converter includes a power oscillator connected to a first transformer winding, and a channel conveying a data stream through galvanic isolation by power signal modulation. A rectifier rectifies the power signal to produce a DC voltage. A comparator produces an error signal from the DC voltage and a reference voltage. An analog-to-digital converter converts the error signal to a digital power control value. A multiplexer multiplexes the digital power control value with the data stream to obtain a multiplexed bitstream. A transmitter driven by the multiplexed bitstream performs amplitude modulation of the power signal at a second transformer winding. A receiver connected to the first winding demodulates the amplitude modulated power signal. A demultiplexer demultiplexes the data stream and the digital power control value. A digital-to-analog converter converts the digital power control value to an analog control signal for the power oscillator.
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公开(公告)号：US10298408B2
公开(公告)日：2019-05-21
申请号：US15138702
申请日：2016-04-26
Applicant: STMicroelectronics S.r.l.
Inventor： Egidio Ragonese , Nunzio Greco , Giuseppe Palmisano
IPC: H04L12/10 , H02J50/10 , H03K17/691 , H03B5/12 , H04B3/54
Abstract: Power and data are transmitted via a transformer including primary side and secondary side. A primary side signal is generated by coupling a first oscillator signal modulated with a data signal with a second oscillator signal that is selectively switched on and off. At the secondary side a secondary signal is generated. A demodulator demodulates the secondary signal to recover the data signal. A rectifier processes the secondary signal to recover a power supply signal controlled by switching on and off the second oscillator.
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公开(公告)号：US20170154727A1
公开(公告)日：2017-06-01
申请号：US15163430
申请日：2016-05-24
Applicant: STMicroelectronics S.r.l.
Inventor： Nunzio Spina , Egidio Ragonese , Giuseppe Palmisano , Nunzio Greco
CPC classification number: H01F38/14 , H01F2038/143 , H01F2038/146 , H01L23/66 , H01L24/06 , H02J50/12 , H02M7/06 , H03B15/00 , H04B5/0037 , H04L25/0266
Abstract: A galvanic isolation system includes a first isolation barrier and a second isolation barrier. The first isolation barrier includes a transformer. The second isolation barrier includes an inductive circuit connected to a secondary winding of the transformer. The first and the second isolation barriers are coupled to form an LC resonant network.
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