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    Image sensor
    11.
    发明授权
    Image sensor 有权

    公开(公告)号：US10043837B2

    公开(公告)日：2018-08-07

    申请号：US15488691

    申请日：2017-04-17

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy ,  Philippe Are

    IPC: H01L27/148 ,  H01L27/146

    Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block charge transfer.

    CONTACT TRENCH BETWEEN STACKED SEMICONDUCTOR SUBSTRATES
    12.
    发明申请
    CONTACT TRENCH BETWEEN STACKED SEMICONDUCTOR SUBSTRATES 有权

    公开(公告)号：US20180090435A1

    公开(公告)日：2018-03-29

    申请号：US15275619

    申请日：2016-09-26

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy

    IPC: H01L23/522 ,  H01L25/065

    CPC classification number: H01L23/5226 ,  H01L25/0657

    Abstract: A first semiconductor substrate layer supports a first transistor including a first source-drain formed by a doped region of the substrate layer. A second semiconductor substrate layer supports a second transistor including a second source-drain formed by a doped region of the substrate layer. The second semiconductor substrate layer is stacked over the first semiconductor substrate layer and separated therefrom by an insulating layer. A metal wiring extends from an electrical contact with the doped region for the first source-drain, through the insulating layer and passing through an electrical isolation structure in the second semiconductor substrate layer to make an electrical contact with the doped region for the second source-drain. The electrical isolation structure is formed by one of a trench isolation or the doped region of the second source-drain itself. The isolation structure has a thickness equal to a thickness of the second semiconductor substrate layer.

    VERTICAL TRANSFER GATE TRANSISTOR AND ACTIVE CMOS IMAGE SENSOR PIXEL INCLUDING A VERTICAL TRANSFER GATE TRANSISTOR
    14.
    发明申请
    VERTICAL TRANSFER GATE TRANSISTOR AND ACTIVE CMOS IMAGE SENSOR PIXEL INCLUDING A VERTICAL TRANSFER GATE TRANSISTOR 审中-公开

    公开(公告)号：US20180061875A1

    公开(公告)日：2018-03-01

    申请号：US15251745

    申请日：2016-08-30

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy

    IPC: H01L27/146 ,  H04N5/225

    CPC classification number: H01L27/14614 ,  H01L27/14689

    Abstract: A transfer gate transistor includes a semiconductor substrate including a charge collection source region, a portion forming a channel region and a top region forming a drain region. A trench in the substrate surrounds the top region and the portion of the substrate. A vertical insulated gate structure for the transistor is formed in the trench. The vertical insulated gate structure includes an insulating liner on sidewalls and a bottom of said trench and an electrode including an upper conductive part and a lower conductive part. A width of the upper conductive part parallel to an upper surface of the substrate increases as depth from the upper surface of the substrate increases. A thickness of the insulating liner adjacent the upper conductive part decreases as depth from the upper surface of the substrate increases. A thickness of the insulating liner adjacent the lower conductive part is substantially constant.

    IMAGE SENSOR OF GLOBAL SHUTTER TYPE
    15.
    发明申请
    IMAGE SENSOR OF GLOBAL SHUTTER TYPE 审中-公开

    公开(公告)号：US20170353673A1

    公开(公告)日：2017-12-07

    申请号：US15358737

    申请日：2016-11-22

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy

    IPC: H04N5/353 ,  H01L27/146 ,  H04N5/378 ,  H04N5/372 ,  H04N5/363

    CPC classification number: H04N5/353 ,  H01L27/14614 ,  H01L27/1464 ,  H01L27/14643 ,  H04N5/363 ,  H04N5/372 ,  H04N5/378

    Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.

    Image sensor
    16.
    发明授权
    Image sensor 有权

    公开(公告)号：US09673247B2

    公开(公告)日：2017-06-06

    申请号：US15136569

    申请日：2016-04-22

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy ,  Philippe Are

    IPC: H01L27/148 ,  H01L27/146

    CPC classification number: H01L27/14607 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14614 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14638 ,  H01L27/14643 ,  H01L27/14812

    Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block said transfer.

    Dual conversion gain image sensor cell
    17.
    发明授权
    Dual conversion gain image sensor cell 有权
    双转换增益图像传感器单元

    公开(公告)号：US09590127B2

    公开(公告)日：2017-03-07

    申请号：US14335095

    申请日：2014-07-18

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy

    IPC: H01L27/00 ,  H01L31/103 ,  H01L27/146 ,  H04N5/378

    CPC classification number: H01L31/103 ,  H01L27/14612 ,  H01L27/14643 ,  H04N5/378

    Abstract: An image sensor cell formed inside and on top of a substrate of a first conductivity type, including: a read region of the second conductivity type; and, adjacent to the read region, a storage region of the first conductivity type topped with a first insulated gate electrode. The first electrode is arranged to receive, in a first operating mode, a first voltage causing the inversion of the conductivity type of the storage region, so that the storage region behaves as an extension of the read region, and, in a second operating mode, a second voltage causing no inversion of the storage region.

    Abstract translation: 在第一导电类型的衬底的内部和顶部形成的图像传感器单元，包括：第二导电类型的读取区域; 并且与读取区域相邻的第一导电类型的存储区域顶上第一绝缘栅电极。 第一电极被布置成在第一操作模式中接收导致存储区域的导电类型的反转的第一电压，使得存储区域表现为读取区域的延伸，并且在第二操作模式 ，不会导致存储区域的反转的第二电压。

    Charge-coupled device
    19.
    发明授权
    Charge-coupled device 有权

    公开(公告)号：US11527570B2

    公开(公告)日：2022-12-13

    申请号：US17199779

    申请日：2021-03-12

    Applicant: STMicroelectronics (Crolles 2) SAS

    Inventor： Francois Roy

    IPC: H01L27/148 ,  H04N5/372 ,  H01L27/146

    Abstract: A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.

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