公开(公告)号：US11494544B2

公开(公告)日：2022-11-08

申请号：US17183630

申请日：2021-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bonghyun Lee ,  Jungho Do

IPC: G06F30/00 ,  G06F30/392 ,  H01L27/02 ,  H01L23/528

Abstract: An integrated circuit includes a first column including a plurality of first cells aligned and placed in a plurality of first rows, each first row having a first width and extending in a first horizontal direction, a second column including a plurality of second cells aligned and placed in a plurality of second rows, each second row having a second width and extending in the first horizontal direction, and an interface column extending in a second horizontal direction perpendicular to the first horizontal direction between the first column and the second column, wherein the interface column includes at least one well tap configured to provide a first supply voltage to a well, and at least one substrate tap configured to provide a second supply voltage to a substrate.

公开(公告)号：US09524922B2

公开(公告)日：2016-12-20

申请号：US14665428

申请日：2015-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyounghwan Lim ,  Hyoun Soo Park ,  Kee Sup Kim ,  Bonghyun Lee ,  Chul Rim ,  JungYun Choi ,  Taewhan Kim ,  Heechun Park

IPC: H01L23/48 ,  H03K19/00 ,  H01L21/66 ,  H01L23/522

CPC classification number: H01L23/481 ,  H01L22/14 ,  H01L22/22 ,  H01L23/5226 ,  H01L25/0657 ,  H01L2924/0002 ,  H03K19/00 ,  H01L2924/00

Abstract: The integrated circuit includes first and second vias, a first buffer configured to receive a signal transmitted from the first via, a second buffer configured to receive a signal transmitted from the second via, a first detour circuit configured to receive a signal transmitted through the second buffer, a second detour circuit configured to receive a signal transmitted through the first buffer, a first selector configured to selectively output one of the signal transmitted from the first via and a signal transmitted through the first detour circuit, and a second selector configured to selectively output one of the signal transmitted from the second via and a signal transmitted through the second detour circuit. Each of the first and second buffers and the first and second detour circuits transmits a signal in only one direction.

Abstract translation: 集成电路包括第一和第二通孔，第一缓冲器被配置为接收从第一通路发送的信号，第二缓冲器，被配置为接收从第二通路发送的信号，第一迂回电路被配置为接收通过第二通孔传输的信号 缓冲器，被配置为接收通过第一缓冲器传输的信号的第二迂回电路，第一选择器，被配置为选择性地输出从第一通孔传输的信号和通过第一迂回电路传输的信号之一;以及第二选择器，其被配置为选择性地 输出从第二通路发送的信号中的一个信号和通过第二迂回电路发送的信号。 第一和第二缓冲器以及第一和第二绕路电路中的每一个仅在一个方向上传输信号。

公开(公告)号：US20240265188A1

公开(公告)日：2024-08-08

申请号：US18641386

申请日：2024-04-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： YONGDEOK KIM ,  MUNJUN SEO ,  Bonghyun Lee

IPC: G06F30/3953 ,  G03F1/36 ,  G06F30/392 ,  G06F30/398

CPC classification number: G06F30/3953 ,  G03F1/36 ,  G06F30/392 ,  G06F30/398

Abstract: Disclosed are a semiconductor device and a method of fabricating the same. The semiconductor device includes an area-oriented region and a performance-oriented region, standard cells disposed on each of the area-oriented region and the performance-oriented region, and a routing metal layer on the standard cells. The routing metal layer includes first routing lines on the area-oriented region and second routing lines on the performance-oriented region. The smallest line width of the first routing lines is a first width, the smallest line width of the second routing lines is a second width greater than the first width, a pitch between the first routing lines is a first pitch, and a pitch between the second routing lines is a second pitch greater than the first pitch.

公开(公告)号：US20220058326A1

公开(公告)日：2022-02-24

申请号：US17183630

申请日：2021-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bonghyun Lee ,  Jungho Do

IPC: G06F30/392 ,  H01L27/02 ,  H01L23/528

Abstract: An integrated circuit includes a first column including a plurality of first cells aligned and placed in a plurality of first rows, each first row having a first width and extending in a first horizontal direction, a second column including a plurality of second cells aligned and placed in a plurality of second rows, each second row having a second width and extending in the first horizontal direction, and an interface column extending in a second horizontal direction perpendicular to the first horizontal direction between the first column and the second column, wherein the interface column includes at least one well tap configured to provide a first supply voltage to a well, and at least one substrate tap configured to provide a second supply voltage to a substrate.

公开(公告)号：US20220005800A1

公开(公告)日：2022-01-06

申请号：US17136754

申请日：2020-12-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bonghyun Lee

IPC: H01L27/02 ,  H01L27/092 ,  H01L23/528 ,  G06F30/392

Abstract: An IC includes: a plurality of first cells placed in a series of first rows extending in a first horizontal direction and each having a first height; and a plurality of second cells placed in a series of second rows extending in the first horizontal direction and each having a second height different from the first height, wherein a total height of the series of first rows corresponds to a multiple of a height of a first multi-height cell with a maximum height among the plurality of first cells, and a total height of the series of second rows corresponds to a multiple of a height of a second multi-height cell with a maximum height among the plurality of second cells.