公开(公告)号：US11482602B2

公开(公告)日：2022-10-25

申请号：US17034088

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Seung Song ,  Tae-Yeol Kim ,  Jae-Jik Baek

IPC: H01L29/417 ,  H01L23/522 ,  H01L29/40

Abstract: A semiconductor device is disclosed. The semiconductor device includes a gate electrode on a substrate and extending in a first direction, source/drain patterns spaced apart from each other, in a second direction, with the gate electrode interposed therebetween, a gate contact electrically connected to the gate electrode, and an active contact electrically connected to at least one of the source/drain patterns. The active contact includes a lower contact pattern electrically connected to the at least one of the source/drain patterns, the lower contact pattern having a first width in the first direction, and an upper contact pattern electrically connected to a top surface of the lower contact pattern, the upper contact pattern having a second width in the first direction that is smaller than the first width. The upper contact pattern and the gate contact horizontally overlap each other.

公开(公告)号：US20190043860A1

公开(公告)日：2019-02-07

申请号：US16158797

申请日：2018-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Min Jeong ,  Kee-Sang Kwon ,  Jin-Wook Lee ,  Ki-Hyung Ko ,  Sang-Jine Park ,  Jae-Jik Baek ,  Bo-Un Yoon ,  Ji-Won Yun

IPC: H01L27/088 ,  H01L29/66 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/423

Abstract: A semiconductor device is provided. The semiconductor device includes a gate spacer that defines a trench on a substrate and includes an upper part and a lower part, a gate insulating film that extends along sidewalls and a bottom surface of the trench and is not in contact with the upper part of the gate spacer, a lower conductive film that extends on the gate insulating film along the sidewalls and the bottom surface of the trench and is not overlapped with the upper part of the gate spacer, and an upper conductive film on an uppermost part of the gate insulating film on the lower conductive film.

公开(公告)号：US09613811B2

公开(公告)日：2017-04-04

申请号：US14525467

申请日：2014-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Jik Baek ,  Sang-Jine Park ,  Bo-Un Yoon ,  Young-Sang Youn ,  Ji-Min Jeong ,  Ji-Hoon Cha

IPC: H01L21/338 ,  H01L21/266 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/66

CPC classification number: H01L21/266 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/845 ,  H01L29/66575

Abstract: A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.