公开(公告)号：US20230142050A1

公开(公告)日：2023-05-11

申请号：US17984417

申请日：2022-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyeongyu YOU ,  Jungho DO ,  Sangdo PARK ,  Jaewoo SEO ,  Jisu YU ,  Minjae JEONG ,  Dayeon CHO

IPC: H01L27/06 ,  H01L49/02 ,  H01L27/02

CPC classification number: H01L27/06 ,  H01L28/88 ,  H01L27/0207

Abstract: An integrated circuit including a plurality of stacked metal layers and a method of manufacturing the integrated circuit are provided. The method includes: providing a plurality of standard cells, each of which includes cell patterns respectively formed on the plurality of metal layers; and forming, on a particular metal layer among the plurality of metal layers which includes patterns extending in a first direction that are respectively formed on a plurality of tracks that are spaced apart from each other in a second direction, an additional pattern between adjacent patterns formed on a particular track of the plurality of tracks based on an interval between the adjacent patterns exceeding a reference value.

公开(公告)号：US20220058331A1

公开(公告)日：2022-02-24

申请号：US17360355

申请日：2021-06-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungman LIM ,  Hakchul JUNG ,  Sanghoon BAEK ,  Jaewoo SEO ,  Jisu YU ,  Hyeongyu YOU

IPC: G06F30/3953 ,  H01L23/528

Abstract: An integrated circuit includes a plurality of logic cells arranged in a first row extending in a first direction and including different types of active areas extending in the first direction, a filler cell arranged in a second row adjacent to the first row in a second direction orthogonal to the first direction and extending in the first direction, and a first routing wiring line arranged in the second row and connecting a first logic cell and a second logic cell apart from each other by a first distance among the plurality of logic cells. A height of the first row is different from a height of the second row.

公开(公告)号：US20210383861A1

公开(公告)日：2021-12-09

申请号：US17412588

申请日：2021-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  G11C7/08 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.

公开(公告)号：US20200005860A1

公开(公告)日：2020-01-02

申请号：US16566002

申请日：2019-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.

公开(公告)号：US20170221554A1

公开(公告)日：2017-08-03

申请号：US15417807

申请日：2017-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.