公开(公告)号：US20230087731A1

公开(公告)日：2023-03-23

申请号：US17994565

申请日：2022-11-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggun YOU ,  Joohee JUNG ,  Jaehyeoung MA ,  Namhyun LEE

IPC: H01L29/78 ,  H01L29/10 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device including a substrate having a central region and a peripheral region; an integrated circuit structure on the central region; and a first structure on the peripheral region and surrounding the central region, wherein a portion of the first structure includes a first fin structure defined by a device isolation region in the substrate; a first dielectric layer covering an upper surface and side surfaces of the first fin structure and an upper surface of the device isolation region; a first gate structure on the first fin structure, the first gate structure including a first gate conductive layer, a first gate dielectric layer covering lower and side surfaces of the first gate conductive layer, and first gate spacer layers on side walls of the first gate conductive layer; and a first insulating structure covering the first dielectric layer and the first gate structure.

公开(公告)号：US20180366583A1

公开(公告)日：2018-12-20

申请号：US16111854

申请日：2018-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L23/535 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/165 ,  H01L27/092 ,  H01L27/11 ,  H01L29/161 ,  H01L29/16

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/845 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US20170117411A1

公开(公告)日：2017-04-27

申请号：US15288080

申请日：2016-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L23/535 ,  H01L29/06 ,  H01L27/11 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/08 ,  H01L27/092

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.