公开(公告)号：US20170194158A1

公开(公告)日：2017-07-06

申请号：US15398776

申请日：2017-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Kwan YU ,  Woonki SHIN ,  Moonhan PARK ,  DongSuk SHIN ,  HanJin LIM

IPC: H01L21/306 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L21/30604 ,  H01L21/02057 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481

Abstract: An etching method is disclosed. The etching method comprises providing on a substrate a structure comprising a recess region formed therein. The recess region includes an inner part and a mouth part whose width is less than that of the inner part. The etching method further comprises performing a clean-then-etch process to remove at least a portion of etching object formed outside the recess region. The performing a clean-then-etch process comprises performing a cleaning process to fill at least a portion of the recess region with a cleaning solution, and performing a wet etch process to the substrate in a state that the cleaning solution remains in the recess region.

公开(公告)号：US20180366583A1

公开(公告)日：2018-12-20

申请号：US16111854

申请日：2018-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L23/535 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/165 ,  H01L27/092 ,  H01L27/11 ,  H01L29/161 ,  H01L29/16

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L21/845 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L27/1211 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US20170117411A1

公开(公告)日：2017-04-27

申请号：US15288080

申请日：2016-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan KIM ,  Gigwan PARK ,  Junggun YOU ,  DongSuk SHIN ,  Jin-Wook KIM

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L23/535 ,  H01L29/06 ,  H01L27/11 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/08 ,  H01L27/092

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L23/535 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.