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    SEMICONDUCTOR DEVICE
    11.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20170244394A1

    公开(公告)日：2017-08-24

    申请号：US15427444

    申请日：2017-02-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji Kyum KIM ,  Dae Seong LEE ,  Min Su KIM

    IPC: H03K3/356 ,  H01L27/105 ,  H01L23/528 ,  H01L27/02 ,  H01L27/092

    CPC classification number: H03K3/356156 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/1052

    Abstract: A semiconductor device includes: first through fourth active regions spaced apart from one another; a first gate line disposed to overlap with the first and second active regions, but not with the third and fourth active regions, and to extend in a first direction; a second gate line disposed to overlap with the third and fourth active regions, but not with the first and second active regions, and to extend in the first direction while being spaced apart from the first gate line; and a dummy gate line disposed to overlap with the first through fourth active regions and a field region, to be spaced apart from the first and second gate lines in a second direction, and to extend in the first direction, wherein a signal input to the first or second active region is transmitted to the third or fourth active region.

    SEMICONDUCTOR DEVICE COMPRISING LOW POWER RETENTION FLIP-FLOP
    13.
    发明申请
    SEMICONDUCTOR DEVICE COMPRISING LOW POWER RETENTION FLIP-FLOP 审中-公开

    公开(公告)号：US20170222633A1

    公开(公告)日：2017-08-03

    申请号：US15399146

    申请日：2017-01-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong Woo KIM ,  Min Su KIM ,  Ah Reum KIM ,  Chung Hee KIM

    IPC: H03K3/3562 ,  H03K3/037

    Abstract: Provided is a semiconductor device including low power retention flip-flop. The semiconductor device includes a first line to which a global power supply voltage is applied, a second line to which a local power supply voltage is applied, the second line being separated from the first line, a first operating circuit connected to the second line to use the local power supply voltage, a first power gating circuit determining whether the local power supply voltage is applied to the first operating circuit and a first retention flip-flop connected to the first line and the second line, wherein the first retention flip-flop comprises a first circuit including a master latch, a second circuit including a slave latch, and a first tri-state inverter connected between the master latch and the slave latch.

    SEMICONDUCTOR DEVICE WITHOUT A BREAK REGION
    14.
    发明申请
    SEMICONDUCTOR DEVICE WITHOUT A BREAK REGION 有权

    公开(公告)号：US20220165734A1

    公开(公告)日：2022-05-26

    申请号：US17666872

    申请日：2022-02-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dae Seong LEE ,  Min Su KIM

    IPC: H01L27/092 ,  H03K19/20 ,  H01L23/528 ,  H03K19/0948 ,  H03K3/356 ,  H03K3/3562 ,  H01L27/02 ,  H01L29/78

    Abstract: A semiconductor device includes a first active region, a second active region, a first gate line disposed to overlap the first and second active regions, a second gate line disposed to overlap the first and second active regions, a first metal line electrically connecting the first and second gate lines and providing a first signal to both the first and second gate lines, a first contact structure electrically connected to part of the first active region between the first and second gate lines, a second contact structure electrically connected to part of the second active region between the first and second gate lines, and a second metal line electrically connected to the first and second contact structures and transmitting a second signal, wherein an overlapped region that is overlapped by the second metal line does not include a break region.

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