公开(公告)号：US20200027986A1

公开(公告)日：2020-01-23

申请号：US16587227

申请日：2019-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug-Hyun Sung ,  Jung-gun YOU ,  Gi-gwan PARK ,  Ki-il KIM

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/092 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8238

Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.

公开(公告)号：US10522539B2

公开(公告)日：2019-12-31

申请号：US16211851

申请日：2018-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Sug-Hyun Sung

IPC: H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/78

Abstract: Provided is a semiconductor device and a fabricating method thereof. The semiconductor device includes a first trench having a first depth to define a fin, a second trench formed directly adjacent the first trench having a second depth that is greater than the first depth, a field insulation layer filling a portion of the first trench and a portion of the second trench, and a protrusion structure protruding from a bottom of the first trench and being lower than a surface of the field insulation layer.

公开(公告)号：US10461189B2

公开(公告)日：2019-10-29

申请号：US16028918

申请日：2018-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sug-Hyun Sung ,  Jung-gun You ,  Gi-gwan Park ,  Ki-il Kim

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/762

Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.

公开(公告)号：US09859398B2

公开(公告)日：2018-01-02

申请号：US15438868

申请日：2017-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Se-Wan Park ,  Seung-Woo Do ,  In-Won Park ,  Sug-Hyun Sung

IPC: H01L29/66 ,  H01L21/306 ,  H01L29/417 ,  H01L21/762 ,  H01L21/308 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L29/66545 ,  H01L21/30604 ,  H01L21/3085 ,  H01L21/76224 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/66818 ,  H01L29/7848 ,  H01L29/785

Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a first fin-shaped pattern including an upper part and a lower part on a substrate, forming a second fin-shaped pattern by removing a part of the upper part of the first fin-shaped pattern, forming a dummy gate electrode intersecting with the second fin-shaped pattern on the second fin-shaped pattern, and forming a third fin-shaped pattern by removing a part of an upper part of the second fin-shaped pattern after forming the dummy gate electrode, wherein a width of the upper part of the second fin-shaped pattern is smaller than a width of the upper part of the first fin-shaped pattern and is greater than a width of an upper portion of the third fin-shaped pattern.

公开(公告)号：US09768169B2

公开(公告)日：2017-09-19

申请号：US14976082

申请日：2015-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Sug-Hyun Sung

IPC: H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/7854

Abstract: Provided is a semiconductor device and a fabricating method thereof. The semiconductor device includes a first trench having a first depth to define a fin, a second trench formed directly adjacent the first trench having a second depth that is greater than the first depth, a field insulation layer filling a portion of the first trench and a portion of the second trench, and a protrusion structure protruding from a bottom of the first trench and being lower than a surface of the field insulation layer.