公开(公告)号：US10211204B2

公开(公告)日：2019-02-19

申请号：US15708512

申请日：2017-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Sug-Hyun Sung

IPC: H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/78

Abstract: Provided is a semiconductor device and a fabricating method thereof. The semiconductor device includes a first trench having a first depth to define a fin, a second trench formed directly adjacent the first trench having a second depth that is greater than the first depth, a field insulation layer filling a portion of the first trench and a portion of the second trench, and a protrusion structure protruding from a bottom of the first trench and being lower than a surface of the field insulation layer.

公开(公告)号：US09711504B2

公开(公告)日：2017-07-18

申请号：US15155744

申请日：2016-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Ki-Il Kim ,  Gi-Gwan Park ,  Sug-Hyun Sung ,  Myung-Yoon Um

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/0886 ,  H01L21/823412 ,  H01L21/823431 ,  H01L27/0207 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

Abstract: A semiconductor device includes a substrate including a first trench, a first fin pattern on the substrate that is defined by the first trench, a gate electrode on the substrate, and a field insulating layer on the substrate. The first fin pattern includes an upper part on a lower part. The first fin pattern includes a first sidewall and a second sidewall opposite each other. The first sidewall is concave along the lower part of the first fin pattern. The second sidewall is tilted along the lower part of the first fin pattern. The field insulating layer surrounds the lower part of the first fin pattern. The gate electrode surrounds the upper part of the first fin pattern.

公开(公告)号：US20170084616A1

公开(公告)日：2017-03-23

申请号：US15213533

申请日：2016-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Il Kim ,  Jung-Gun You ,  Gi-Gwan Park

IPC: H01L27/11 ,  H01L29/78 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L27/1104 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

Abstract: A semiconductor device can include a field insulating film on a substrate and a fin-type pattern of a particular material, on the substrate, having a first sidewall and an opposing second sidewall. The fin-type pattern can include a first portion of the fin-type pattern that protrudes from an upper surface of the field insulating film and a second portion of the fin-type pattern disposed on the first portion. A third portion of the fin-type pattern can be disposed on the second portion where the third portion can be capped by a top rounded surface of the fin-type pattern and the first sidewall can have an undulated profile that spans the first, second and third portions.

公开(公告)号：US10910373B2

公开(公告)日：2021-02-02

申请号：US16794029

申请日：2020-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Se-wan Park ,  Baik-Min Sung ,  Bo-Cheol Jeong

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.

公开(公告)号：US20200161313A1

公开(公告)日：2020-05-21

申请号：US16751460

申请日：2020-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Il Kim ,  Jung-Gun You ,  Gi-Gwan Park

IPC: H01L27/11 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238

Abstract: A semiconductor device can include a field insulating film on a substrate and a fin-type pattern of a particular material, on the substrate, having a first sidewall and an opposing second sidewall. The fin-type pattern can include a first portion of the fin-type pattern that protrudes from an upper surface of the field insulating film and a second portion of the fin-type pattern disposed on the first portion. A third portion of the fin-type pattern can be disposed on the second portion where the third portion can be capped by a top rounded surface of the fin-type pattern and the first sidewall can have an undulated profile that spans the first, second and third portions.

公开(公告)号：US09865736B2

公开(公告)日：2018-01-09

申请号：US15292144

申请日：2016-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chong-Kwang Chang ,  Young-Mook Oh ,  Hak-Yoon Ahn ,  Jung-Gun You ,  Gi-Gwan Park ,  Baik-Min Sung

IPC: H01L29/78 ,  H01L23/528 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L29/785 ,  H01L21/76807 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53295 ,  H01L2029/7858

Abstract: A semiconductor device includes a gate structure on a substrate, a source/drain layer on a portion of the substrate adjacent the gate structure, a first contact plug contacting an upper surface of the source/drain layer, and a second contact plug contacting upper surfaces of the gate structure and the first contact plug. A bottom surface of the second contact plug has a first portion not contacting the upper surface of the first contact plug, and the first portion is higher than the upper surface of the gate structure.

公开(公告)号：US09865495B2

公开(公告)日：2018-01-09

申请号：US15220094

申请日：2016-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Il Kim ,  Gi-Gwan Park ,  Jung-Gun You ,  Hyung-Dong Kim ,  Sug-Hyun Sung ,  Myung-Yoon Um

IPC: H01L21/76 ,  H01L21/762 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L27/11

CPC classification number: H01L21/76229 ,  H01L27/1104 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/7853

Abstract: A method of fabricating a semiconductor device includes forming a plurality of mask patterns comprising a real mask pattern and a dummy mask pattern on a substrate, removing the dummy mask pattern and etching the substrate using the real mask pattern as a mask to form a first trench, a second trench, and a fin-type pattern defined by the first trench and the second trench. The second trench contacting the fin-type pattern comprises a smooth pattern which is convex and positioned between a bottom surface and a side surface of the second trench, a first concave portion which is positioned between the side surface of the second trench and the smooth pattern, and a second concave portion which is positioned between the convex portion and the bottom surface of the second trench.

公开(公告)号：US09536825B2

公开(公告)日：2017-01-03

申请号：US14712136

申请日：2015-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Wei-Hua Hsu ,  Choong-Ho Lee ,  Hyung-Jong Lee

IPC: H01L21/70 ,  H01L23/522 ,  H01L27/092 ,  H01L27/088 ,  H01L23/485 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/088 ,  H01L27/0883 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed on the first region and the second region, respectively, a first contact formed on the first transistor, and a second contact formed on the second transistor. The first contact includes a first work function control layer having a first thickness and a first conductive layer formed on the first work function control layer, the second contact includes a second work function control layer having a second thickness different from the first thickness and a second conductive layer formed on the second work function control layer, and the first contact and the second contact have different work functions.

Abstract translation: 提供半导体器件及其制造方法。 该半导体器件包括分别包括第一区域和第二区域的基板，分别形成在第一区域和第二区域上的第一晶体管和第二晶体管，形成在第一晶体管上的第一触点和形成在第一晶体管上的第二触点 第二晶体管。 第一触点包括具有第一厚度的第一功函数控制层和形成在第一功函数控制层上的第一导电层，第二触点包括具有不同于第一厚度的第二厚度的第二功函数控制层， 导电层形成在第二功函数控制层上，第一触点和第二触点具有不同的功能。

公开(公告)号：US11600711B2

公开(公告)日：2023-03-07

申请号：US17329240

申请日：2021-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Myung-Yoon Um ,  Young-Joon Park ,  Jeong-Hyo Lee ,  Ji-Yong Ha ,  Jun-sun Hwang

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/28 ,  H01L29/40 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/092 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/49

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin.

公开(公告)号：US11043568B2

公开(公告)日：2021-06-22

申请号：US16220028

申请日：2018-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Myung-Yoon Um ,  Young-Joon Park ,  Jeong-Hyo Lee ,  Ji-Yong Ha ,  Jun-sun Hwang

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/28 ,  H01L29/40 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/092 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/49

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin.