公开(公告)号：US20200167297A1

公开(公告)日：2020-05-28

申请号：US16777206

申请日：2020-01-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dimin NIU ,  Mu-Tien CHANG ,  Hongzhong ZHENG ,  Sun Young LIM ,  lndong KIM ,  Jangseok CHOI ,  Craig HANSON

IPC: G06F13/16 ,  G06F13/40 ,  G06F13/42

Abstract: A memory module includes: a non-volatile memory; and an asynchronous memory interface to interface with a memory controller. The asynchronous memory interface may use repurposed pins of a double data rate (DDR) memory channel to send an asynchronous data to the memory controller. The asynchronous data may be device feedback indicating a status of the non-volatile memory.

公开(公告)号：US20170365305A1

公开(公告)日：2017-12-21

申请号：US15231629

申请日：2016-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mu-Tien CHANG ,  Dimin NIU ,  Hongzhong ZHENG ,  Craig HANSON ,  Sun Young LIM ,  Indong KIM ,  Jangseok CHOI

IPC: G11C7/10 ,  G06F1/32

CPC classification number: G11C7/1072 ,  G06F1/32 ,  G06F1/3234 ,  G06F1/325 ,  G06F1/3275 ,  G06F1/3287 ,  G11C5/04 ,  G11C5/148 ,  G11C7/10 ,  G11C7/22 ,  G11C11/4074 ,  G11C2207/2227 ,  Y02D10/14 ,  Y02D50/20

Abstract: A memory module includes a plurality of memory components, an in-memory power manager, and an interface to a host computer over a memory bus. The in-memory power manager is configured to control a transition of a power state of the memory module. The transition of the power state of the memory module includes a direct transition from a low power down state to a maximum power down state.