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公开(公告)号:US20240098974A1
公开(公告)日:2024-03-21
申请号:US18501576
申请日:2023-11-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeonil LEE , Youngjun KIM , Jinbum KIM
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/0335 , H10B12/37 , H10B12/482
Abstract: A semiconductor device including an active pattern; a gate structure connected to the active pattern; a bit line structure connected to the active pattern; a buried contact connected to the active pattern; a contact pattern covering the buried contact; a landing pad connected to the contact pattern; and a capacitor structure connected to the landing pad, wherein the buried contact includes a first growth portion and a second growth portion spaced apart from each other, and the landing pad includes an interposition portion between the first growth portion and the second growth portion.
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公开(公告)号:US20230420826A1
公开(公告)日:2023-12-28
申请号:US18244039
申请日:2023-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngjung KIM , Jonghyuck LEE , Youngjun KIM , Jongsuk KIM , Kyungbin KIM , Kwangseo KIM , Donghwan KIM
CPC classification number: H01Q1/243 , H01Q21/08 , H01Q9/0407
Abstract: An electronic device according to various embodiments may comprise: a housing; an antenna structure comprising a substrate, which comprises a first substrate surface facing a first direction and a second substrate surface facing a second direction opposite from the first substrate surface, and at least one antenna element disposed on the substrate so as to form a beam pattern in the first direction; a first support part disposed so as to at least partially correspond to the second substrate surface; a conductive bracket comprising at least one conductive extension part disposed higher than the second substrate surface with respect to the first support part; and a wireless communication circuit configured to transmit and/or receive a wireless signal in a designated frequency band by means of the at least one antenna element.
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公开(公告)号:US20230290681A1
公开(公告)日:2023-09-14
申请号:US17957473
申请日:2022-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Taekyung YOON , Youngjun KIM , Hunyoung BARK , Eun-Ok LEE , Jaejin LEE , Dongju CHANG
IPC: H01L21/768 , H01L21/67 , H01L21/3213
CPC classification number: H01L21/76877 , H01L21/76829 , H01L21/67103 , H01L21/3213 , H01L21/76856
Abstract: Provided is a method of fabricating a semiconductor device including forming a device isolation layer defining active regions on a substrate and forming gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming a trench crossing the active regions in the substrate, forming a conductive layer filling the trench, and performing a heat treatment process on the conductive layer. The conductive layer includes a nitride of a first metal. Nitrogen atoms in the conductive layer are diffused toward an outer surface and a lower surface of the conductive layer by the heat treatment process.
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