公开(公告)号：US20240035159A1

公开(公告)日：2024-02-01

申请号：US18223606

申请日：2023-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungrim KIM ,  Youngeun KIM ,  Youngjun KIM ,  Jihoon KIM ,  Taekjung KIM ,  Dongju CHANG

IPC: C23C16/455 ,  C23C16/448

CPC classification number: C23C16/45561 ,  C23C16/448 ,  C23C16/45589

Abstract: A precursor supply system includes a storage tank storing the precursor in a solid state; a transfer pipe connected to the storage tank to transfer the precursor in a solid state; a phase converter connected to the transfer pipe and sublimating the transported solid-state precursor into vapor; a supply pipe connected to the phase converter and transporting a precursor in a vaporous state; and a process chamber disposed adjacently to the phase converter and connected to the supply pipe.

公开(公告)号：US20240315009A1

公开(公告)日：2024-09-19

申请号：US18386916

申请日：2023-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jihoon KIM ,  Dohyung KIM ,  Youngjun KIM ,  Taekjung KIM ,  Yeonju OH ,  Jaejin LEE ,  Dongju CHANG ,  Seohyeong JANG

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053 ,  H10B12/315

Abstract: A semiconductor memory device is provided. The semiconductor memory device includes: an active pattern provided on a substrate and enclosed by a device isolation pattern; and a word line crossing the active pattern and the device isolation pattern in a first direction parallel to a bottom surface of the substrate, and including a first gate electrode and a second gate electrode, which are adjacent to each other in the first direction. A second work function of the second gate electrode is greater than a first work function of the first gate electrode.

公开(公告)号：US20230290681A1

公开(公告)日：2023-09-14

申请号：US17957473

申请日：2022-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taekyung YOON ,  Youngjun KIM ,  Hunyoung BARK ,  Eun-Ok LEE ,  Jaejin LEE ,  Dongju CHANG

IPC: H01L21/768 ,  H01L21/67 ,  H01L21/3213

CPC classification number: H01L21/76877 ,  H01L21/76829 ,  H01L21/67103 ,  H01L21/3213 ,  H01L21/76856

Abstract: Provided is a method of fabricating a semiconductor device including forming a device isolation layer defining active regions on a substrate and forming gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming a trench crossing the active regions in the substrate, forming a conductive layer filling the trench, and performing a heat treatment process on the conductive layer. The conductive layer includes a nitride of a first metal. Nitrogen atoms in the conductive layer are diffused toward an outer surface and a lower surface of the conductive layer by the heat treatment process.