公开(公告)号：US20240048870A1

公开(公告)日：2024-02-08

申请号：US18354162

申请日：2023-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunyool KANG ,  Haesick SUL ,  Yunhwan JUNG ,  Yongjun CHO ,  Heesung CHAE

IPC: H04N25/772 ,  H03M1/34 ,  H03M1/12

CPC classification number: H04N25/772 ,  H03M1/34 ,  H03M1/1205

Abstract: Provided are analog-digital converting circuits including a comparator, and an image sensor. The analog-digital converting circuit include a counter and a comparator, the comparator including a first P-type transistor including a gate connected to a first input node of the comparator, a second P-type transistor including a gate connected to a second input node of the comparator, a first N-type transistor including a gate connected to the first input node and a drain connected to the first P-type transistor, a second N-type transistor including a gate connected to the second input node and a drain connected to the second P-type transistor, and a transistor including a gate connected to the drain of the first N-type transistor and a source to which ground voltage or power supply voltage is applied.

公开(公告)号：US20210382513A1

公开(公告)日：2021-12-09

申请号：US17150316

申请日：2021-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Min KIM ,  Haesick SUL ,  Sunyool KANG ,  Yunhong KIM ,  Seungmin SUH ,  Hyeonji LEE ,  Yunhwan JUNG

IPC: G05F3/26 ,  G05F1/46

Abstract: Disclosed is a bandgap reference circuit, which includes a first current generator that generates a first current proportional to a temperature, a second current generator that outputs a second current obtained by mirroring the first current to a first node at which a reference voltage is formed, a first resistor that is connected with the first node and is supplied with the second current, and a first bipolar junction transistor (BJT) that includes an emitter node connected with the first resistor, a base node supplied with a first power, and a collector node supplied with a second power different from the first power.

公开(公告)号：US20210067723A1

公开(公告)日：2021-03-04

申请号：US16838483

申请日：2020-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungtae KIM ,  Yunhwan JUNG ,  Heesung CHAE ,  Sukki YOON

IPC: H04N5/376 ,  H04N5/374

Abstract: An image sensor includes a pixel array including pixels that are arranged in a matrix and respectively generate pixel signals, a row driver to drive the plurality of pixels row by row, a timing generator to generate a clock signal and address signals, a column driver to generate a plurality of column selection signals sequentially activated in response to the clock signal and the address signals, and a column array to receive the pixel signals through a plurality of column lines, perform an analog-to-digital conversion on the pixel signals, and sequentially output pixel data values through an output buffer. The column driver may include a clock tree including first delay elements and second delay elements to generate a plurality of delay clock signals, and a decoding circuit to generate the plurality of column selection signals.

公开(公告)号：US20200058583A1

公开(公告)日：2020-02-20

申请号：US16663582

申请日：2019-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunhwan JUNG ,  Sunyool KANG ,  Jaehong KIM

IPC: H01L23/522 ,  H01L27/08 ,  H03K4/08 ,  H04N5/378 ,  H04N5/357

Abstract: A comparison circuit that includes an input sampling capacitor and an image sensor including the same are provided. The comparison circuit includes an amplifier configured to receive a pixel signal and a ramp signal to perform a correlated double sampling operation, a first pixel capacitor connected to the amplifier through a first floating node and configured to transmit the pixel signal, a first ramp capacitor connected to the amplifier through a second floating node and configured to transmit the ramp signal, a second pixel capacitor connected in parallel to the first pixel capacitor, and a second ramp capacitor connected in parallel to the first ramp capacitor, wherein the second pixel capacitor is formed between the first floating node and first peripheral routing lines, and the second ramp capacitor is formed between the second floating node and second peripheral routing lines.