公开(公告)号：US08026891B2

公开(公告)日：2011-09-27

申请号：US11450771

申请日：2006-06-09

申请人： Jong-Seon Kim ,  Jun-Hyung Souk ,  Myung-Ryul Choi ,  Seung-Woo Lee

发明人： Jong-Seon Kim ,  Jun-Hyung Souk ,  Myung-Ryul Choi ,  Seung-Woo Lee

IPC分类号： G09G3/36

CPC分类号： G09G5/006

摘要： The present invention relates to a digital data transceiver circuit applicable to a flat panel display such as an LCD to be placed between graphic signal generation module and liquid crystal display module or between timing control IC and data driver IC, etc. A digital data transceiver circuit of the present invention has a first current source and a second current source, and the second current source is controlled to supply a current or not depending on the status of the lower bit of input data. A transmitter is connected to a node, on which the first and second current sources combine, and the transmission paths of currents from the two current sources are determined depending on the status of the upper bit of input data. A signal of the transmitter is transmitted through a transmission line, and a termination resistor is connected to the transmission line. A receiver detects output data according to a voltage applied to the termination resistor. The digital data transceiver circuit of the present invention can transmit 2-bit or 3-bit data during one clock period, and it is resistible to the noise better than the voltage transmission method and effective to long distance transmission.

摘要翻译： 数字数据收发电路技术领域本发明涉及适用于诸如LCD之类的平板显示器的数字数据收发器电路，放置在图形信号发生模块和液晶显示模块之间，或定时控制IC与数据驱动器IC之间。数字数据收发电路 本发明具有第一电流源和第二电流源，并且第二电流源被控制以根据输入数据的较低位的状态来提供电流。 发射机连接到第一和第二电流源组合的节点，并且根据输入数据的较高位的状态确定来自两个电流源的电流的传输路径。 发射机的信号通过传输线传输，终端电阻连接到传输线。 接收机根据施加到终端电阻器的电压来检测输出数据。 本发明的数字数据收发电路可以在一个时钟周期内发送2位或3位数据，并且比电压传输方式更能抵抗噪声，有效地进行长距离传输。

公开(公告)号：US07923176B2

公开(公告)日：2011-04-12

申请号：US12035086

申请日：2008-02-21

申请人： Chong-Chul Chai ,  Mee-Hye Jung ,  Woo-Geun Lee ,  Woo-Seok Jeon ,  Young-Wook Lee ,  Jung-In Park ,  Jun-Hyung Souk ,  Won-Kie Chang ,  Shi-Yul Kim

发明人： Chong-Chul Chai ,  Mee-Hye Jung ,  Woo-Geun Lee ,  Woo-Seok Jeon ,  Young-Wook Lee ,  Jung-In Park ,  Jun-Hyung Souk ,  Won-Kie Chang ,  Shi-Yul Kim

IPC分类号： G03F1/00 ,  G06C5/00

CPC分类号： G03F1/36 ,  G03F1/00 ,  G03F1/50

摘要： A mask includes a transparent substrate, a light-blocking layer and a halftone layer. The light-blocking layer includes a source electrode pattern portion including a first electrode portion, a second electrode portion and a third electrode portion, and a drain electrode pattern portion disposed between the second electrode portion and the third electrode portion. The halftone layer includes a halftone portion corresponding to a spaced-apart portion between the source electrode pattern portion and the drain electrode pattern portion, and a dummy halftone portion more protrusive than ends of the second electrode portion and the third electrode portion. Thus, a photoresist pattern corresponding to a channel portion of a thin film transistor (TFT) may be formed with a uniform thickness, to thereby prevent an excessive etching of the channel portion.

摘要翻译： 掩模包括透明基板，遮光层和半色调层。 遮光层包括包括第一电极部分，第二电极部分和第三电极部分的源电极图案部分和设置在第二电极部分和第三电极部分之间的漏电极图案部分。 半色调层包括对应于源电极图案部分和漏电极图案部分之间的间隔部分的半色调部分和比第二电极部分和第三电极部分的端部更突出的虚拟半色调部分。 因此，可以形成对应于薄膜晶体管（TFT）的沟道部分的光致抗蚀剂图案，其厚度均匀，从而防止通道部分的过度蚀刻。

公开(公告)号：US07616271B2

公开(公告)日：2009-11-10

申请号：US11539458

申请日：2006-10-06

申请人： Jun-Hyung Souk ,  In-Sun Hwang

发明人： Jun-Hyung Souk ,  In-Sun Hwang

IPC分类号： G02F1/1335 ,  F21V7/04

CPC分类号： G02B6/0068 ,  G02B6/0051 ,  G02B6/0053 ,  G02B6/0055 ,  G02B6/0073 ,  G02B6/0078

摘要： A backlight assembly and a display device having the backlight assembly include a plurality of light guiding plates, and at least one light source unit that illuminates the light guiding plates, wherein the light guiding plates are provided with protrusions that protrude from facing planes thereof so as to allow the adjacent light guiding plates to be separated from each other by a separation distance.

摘要翻译： 具有背光组件的背光组件和显示装置包括多个导光板，以及照亮导光板的至少一个光源单元，其中，导光板设置有从其面对面突出的突起，以便 以允许相邻的导光板彼此分开一段间隔距离。

公开(公告)号：US20080187870A1

公开(公告)日：2008-08-07

申请号：US12020650

申请日：2008-01-28

申请人： Kyoung-Ju SHIN ,  Jun-Hyung Souk ,  Chong-Chul Chai

发明人： Kyoung-Ju SHIN ,  Jun-Hyung Souk ,  Chong-Chul Chai

IPC分类号： G03F7/22 ,  G03F7/26 ,  H01L21/308

CPC分类号： H01L27/1288 ,  G02F1/1303 ,  G03F7/70291 ,  G03F7/70466 ,  H01L21/0275 ,  H01L21/32139 ,  H01L27/1214

摘要： A method for forming a photoresist pattern includes forming a photoresist, and forming a photoresist pattern having a step portion by performing a light exposure process a different number of times according to a region. A method for manufacturing a display panel and a method for manufacturing a display device are also provided.

摘要翻译： 形成光致抗蚀剂图案的方法包括形成光致抗蚀剂，并且根据区域进行不同次数的曝光处理，形成具有台阶部分的光致抗蚀剂图案。 还提供了一种显示面板的制造方法和显示装置的制造方法。

公开(公告)号：US20080017884A1

公开(公告)日：2008-01-24

申请号：US11766329

申请日：2007-06-21

申请人： Chang-Oh Jeong ,  Sang-Gab Kim ,  Jun-Hyung Souk ,  Hong-Gyun Kim ,  In-Sun Hwang ,  Min-Seok Oh ,  Hong-Kee Chin ,  Yu-Gwang Jeong ,  Seung-Ha Choi ,  Hi-Kuk Lee ,  Shi-Yul Kim

发明人： Chang-Oh Jeong ,  Sang-Gab Kim ,  Jun-Hyung Souk ,  Hong-Gyun Kim ,  In-Sun Hwang ,  Min-Seok Oh ,  Hong-Kee Chin ,  Yu-Gwang Jeong ,  Seung-Ha Choi ,  Hi-Kuk Lee ,  Shi-Yul Kim

IPC分类号： H01L27/13 ,  H01L21/3205 ,  H01L23/48

CPC分类号： G02F1/133528 ,  G02F1/134336 ,  G02F2001/133548 ,  H01L27/12

摘要： A display apparatus includes a first substrate, a gate line formed on the first substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line formed on the semiconductor layer and including a source electrode, a drain electrode facing the source electrode, a first electrode electrically connected to the drain electrode, in a second substrate facing the first substrate, a second electrode formed on the second substrate, and a liquid crystal layer disposed between the first electrode and the second electrode. At least one of the first and second electrodes includes a plurality of line patterns to polarize incident light.

摘要翻译： 显示装置包括第一基板，形成在第一基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，形成在半导体层上的数据线，并且包括源极 面对源电极的漏电极，与漏电极电连接的第一电极，与第一衬底相对的第二衬底，形成在第二衬底上的第二电极，以及设置在第一电极和第二电极之间的液晶层 电极。 第一和第二电极中的至少一个包括使入射光偏振的多个线图案。

公开(公告)号：US07742118B2

公开(公告)日：2010-06-22

申请号：US11690563

申请日：2007-03-23

申请人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

发明人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

IPC分类号： G02F1/136

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

摘要： A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.

摘要翻译： 提供一种制造薄膜晶体管阵列面板的方法，该方法包括：在绝缘基板上形成栅极线; 形成栅极绝缘层; 形成半导体层; 形成包括数据线和漏电极的数据导电层; 沉积钝化层; 形成包括位于所述栅极线的端部的第一部分的光致抗蚀剂，比所述第一部分更厚且位于所述漏极上的第二部分，以及比所述第二部分更厚的第三部分; 通过使用光致抗蚀剂作为蚀刻掩模，将光致抗蚀剂的第二部分下的钝化层的一部分暴露在光致抗蚀剂的第一部分下方的栅绝缘层的一部分; 形成分别露出所述漏电极和所述栅极线的端部的第一和第二接触孔; 以及通过所述第一接触孔形成连接到所述漏电极的像素电极。

公开(公告)号：US20080198122A1

公开(公告)日：2008-08-21

申请号：US12069968

申请日：2008-02-13

申请人： Kyoung-Ju Shin ,  Jun-Hyung Souk ,  Chong-Chul Chai

发明人： Kyoung-Ju Shin ,  Jun-Hyung Souk ,  Chong-Chul Chai

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G3/3614 ,  G09G2310/06 ,  G09G2320/0219 ,  G09G2320/0247 ,  G09G2320/0252 ,  G09G2320/0276 ,  G09G2340/16

摘要： A display device includes a gate driving part, a data driving part, a display panel and a kickback voltage compensating part. The gate driving part outputs a gate signal, and the data driving part outputs a data signal. The display panel displays an image in response to the gate signal and the data signal. A pixel voltage of the display panel is reduced by a kickback voltage varied based on a gray scale and induced when the gate signal falls. The kickback voltage compensating part compensates an image control signal externally provided to the kickback voltage compensating part for the kickback voltage to output a data control signal to the data driving part.

摘要翻译： 显示装置包括门驱动部，数据驱动部，显示面板和反冲电压补偿部。 栅极驱动部输出栅极信号，数据驱动部输出数据信号。 显示面板响应于门信号和数据信号显示图像。 显示面板的像素电压由基于灰度变化的反冲电压减小，并且当栅极信号下降时被感应。 反冲电压补偿部件补偿外部提供给反冲电压补偿部分的反射电压的图像控制信号，以将数据控制信号输出到数据驱动部分。

公开(公告)号：US07403240B2

公开(公告)日：2008-07-22

申请号：US11741470

申请日：2007-04-27

申请人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

发明人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

IPC分类号： G02F1/136 ,  G02F1/1335

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

摘要： A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.

摘要翻译： 提供一种制造薄膜晶体管阵列面板的方法，该方法包括：在绝缘基板上形成栅极线; 形成栅极绝缘层; 形成半导体层; 形成包括数据线和漏电极的数据导电层; 沉积钝化层; 形成包括位于所述栅极线的端部的第一部分的光致抗蚀剂，比所述第一部分更厚且位于所述漏极上的第二部分，以及比所述第二部分更厚的第三部分; 通过使用光致抗蚀剂作为蚀刻掩模，将光致抗蚀剂的第二部分下的钝化层的一部分暴露在光致抗蚀剂的第一部分下方的栅绝缘层的一部分; 形成分别露出所述漏电极和所述栅极线的端部的第一和第二接触孔; 以及通过所述第一接触孔形成连接到所述漏电极的像素电极。

公开(公告)号：US20070190706A1

公开(公告)日：2007-08-16

申请号：US11690563

申请日：2007-03-23

申请人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

发明人： Jun-Hyung Souk ,  Jeong-Young Lee ,  Jong-Soo Yoon ,  Kwon-Young Choi ,  Bum-Ki Baek

IPC分类号： H01L21/84

CPC分类号： G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288

摘要： A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.

摘要翻译： 提供一种制造薄膜晶体管阵列面板的方法，该方法包括：在绝缘基板上形成栅极线; 形成栅极绝缘层; 形成半导体层; 形成包括数据线和漏电极的数据导电层; 沉积钝化层; 形成包括位于所述栅极线的端部的第一部分的光致抗蚀剂，比所述第一部分更厚且位于所述漏极上的第二部分，以及比所述第二部分更厚的第三部分; 通过使用光致抗蚀剂作为蚀刻掩模，将光致抗蚀剂的第二部分下的钝化层的一部分暴露在光致抗蚀剂的第一部分下方的栅绝缘层的一部分; 形成分别露出所述漏电极和所述栅极线的端部的第一和第二接触孔; 以及通过所述第一接触孔形成连接到所述漏电极的像素电极。

公开(公告)号：US20060227124A1

公开(公告)日：2006-10-12

申请号：US11450771

申请日：2006-06-09

申请人： Jong-Seon Kim ,  Jun-Hyung Souk ,  Myung-Ryul Choi ,  Seung-Woo Lee

发明人： Jong-Seon Kim ,  Jun-Hyung Souk ,  Myung-Ryul Choi ,  Seung-Woo Lee

IPC分类号： G09G5/00

CPC分类号： G09G5/006

摘要： The present invention relates to a digital data transceiver circuit applicable to a flat panel display such as an LCD to be placed between graphic signal generation module and liquid crystal display module or between timing control IC and data driver IC, etc. A digital data transceiver circuit of the present invention has a first current source and a second current source, and the second current source is controlled to supply a current or not depending on the status of the lower bit of input data. A transmitter is connected to a node, on which the first and second current sources combine, and the transmission paths of currents from the two current sources are determined depending on the status of the upper bit of input data. A signal of the transmitter is transmitted through a transmission line, and a termination resistor is connected to the transmission line. A receiver detects output data according to a voltage applied to the termination resistor. The digital data transceiver circuit of the present invention can transmit 2-bit or 3-bit data during one clock period, and it is resistible to the noise better than the voltage transmission method and effective to long distance transmission.