Discrete Clock Generator and Timing/Frequency Reference
    11.
    发明申请
    Discrete Clock Generator and Timing/Frequency Reference 有权
    离散时钟发生器和定时/频率参考

    公开(公告)号:US20080150645A1

    公开(公告)日:2008-06-26

    申请号:US12036165

    申请日:2008-02-22

    IPC分类号: H03B5/12 H03L1/02

    摘要: In various embodiments, the invention provides a discrete clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which may then be provided to other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

    摘要翻译: 在各种实施例中,本发明提供使用LC振荡器拓扑的离散时钟发生器和/或定时和频率参考,其具有频率控制器来控制和提供稳定的谐振频率,然后可以将其提供给其它第二电路,例如 作为处理器或控制器。 提供了频率稳定性,如选择的参数(如温度和制造工艺变化)的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器,其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中,响应于温度波动将传感器实现为电流源,并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感,并且可以是二进制加权的。 还提供了电阻模块的阵列,以产生一个或多个控制电压。

    Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration
    12.
    发明授权
    Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration 有权
    多端谐波振荡器集成电路,具有频率校准和频率配置

    公开(公告)号:US07679463B2

    公开(公告)日:2010-03-16

    申请号:US11805368

    申请日:2007-05-23

    IPC分类号: H03B5/04 H03B1/00

    摘要: Exemplary embodiments of the invention provide a reference harmonic oscillator integrated circuit having three or more terminals, with systems and methods for calibrating the harmonic oscillator to a selected first frequency using a limited number of terminals. An exemplary apparatus comprises: a reference harmonic oscillator, a first terminal to receive a supply voltage, a second terminal to receive a ground potential, a third terminal to provide an output signal having an output frequency, and may also include a fourth terminal. One of the first, second, third or fourth terminals is further adapted for input of a calibration of the first frequency. The exemplary apparatus may enter calibration and testing modes in response to various commands such as a calibration mode signal, and may also be configured through one of the terminals for output frequency selection, spread-spectrum output, and output voltage levels.

    摘要翻译: 本发明的示例性实施例提供了具有三个或更多个端子的参考谐波振荡器集成电路,其具有使用有限数量的端子将谐波振荡器校准为所选择的第一频率的系统和方法。 示例性装置包括:参考谐波振荡器,用于接收电源电压的第一端子,用于接收地电位的第二端子,第三端子以提供具有输出频率的输出信号,并且还可以包括第四端子。 第一,第二,第三或第四端子中的一个进一步适于输入第一频率的校准。 示例性装置可以响应于诸如校准模式信号的各种命令而进入校准和测试模式,并且还可以通过用于输出频率选择,扩频输出和输出电压电平的一个端子进行配置。

    Integrated Clock Generator and Timing/Frequency Reference
    13.
    发明申请
    Integrated Clock Generator and Timing/Frequency Reference 有权
    集成时钟发生器和时序/频率参考

    公开(公告)号:US20080143454A1

    公开(公告)日:2008-06-19

    申请号:US12036185

    申请日:2008-02-22

    IPC分类号: H03B5/12

    摘要: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which is integrated with other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

    摘要翻译: 在各种实施例中,本发明提供使用LC振荡器拓扑的时钟发生器和/或定时和频率参考,其具有频率控制器以控制和提供稳定的谐振频率,其与其它第二电路(例如处理器 或控制器。 提供了频率稳定性,如选择的参数(如温度和制造工艺变化)的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器,其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中,响应于温度波动将传感器实现为电流源,并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感,并且可以是二进制加权的。 还提供了电阻模块的阵列,以产生一个或多个控制电压。

    Integrated clock generator and timing/frequency reference
    14.
    发明授权
    Integrated clock generator and timing/frequency reference 有权
    集成时钟发生器和定时/频率参考

    公开(公告)号:US07365614B2

    公开(公告)日:2008-04-29

    申请号:US11384758

    申请日:2006-03-20

    IPC分类号: H03B5/12

    摘要: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which is integrated with other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

    摘要翻译: 在各种实施例中,本发明提供使用LC振荡器拓扑的时钟发生器和/或定时和频率参考,其具有频率控制器以控制和提供稳定的谐振频率,其与其它第二电路(例如处理器 或控制器。 提供了频率稳定性,如选择的参数(如温度和制造工艺变化)的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器,其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中,响应于温度波动将传感器实现为电流源,并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感,并且可以是二进制加权的。 还提供了电阻模块的阵列,以产生一个或多个控制电压。

    Integrated clock generator and timing/frequency reference
    15.
    发明申请
    Integrated clock generator and timing/frequency reference 有权
    集成时钟发生器和定时/频率参考

    公开(公告)号:US20060152293A1

    公开(公告)日:2006-07-13

    申请号:US11384758

    申请日:2006-03-20

    IPC分类号: H03B1/00

    摘要: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which is integrated with other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

    摘要翻译: 在各种实施例中,本发明提供使用LC振荡器拓扑的时钟发生器和/或定时和频率参考,其具有频率控制器以控制和提供稳定的谐振频率,其与其它第二电路(例如处理器 或控制器。 提供了频率稳定性,如选择的参数(如温度和制造工艺变化)的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器,其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中,响应于温度波动将传感器实现为电流源,并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感,并且可以是二进制加权的。 还提供了电阻模块的阵列,以产生一个或多个控制电压。

    Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration
    16.
    发明申请
    Multi-terminal harmonic oscillator integrated circuit with frequency calibration and frequency configuration 有权
    多端谐波振荡器集成电路,具有频率校准和频率配置

    公开(公告)号:US20070222528A1

    公开(公告)日:2007-09-27

    申请号:US11805368

    申请日:2007-05-23

    IPC分类号: G01R23/00

    摘要: Exemplary embodiments of the invention provide a reference harmonic oscillator integrated circuit having three or more terminals, with systems and methods for calibrating the harmonic oscillator to a selected first frequency using a limited number of terminals. An exemplary apparatus comprises: a reference harmonic oscillator, a first terminal to receive a supply voltage, a second terminal to receive a ground potential, a third terminal to provide an output signal having an output frequency, and may also include a fourth terminal. One of the first, second, third or fourth terminals is further adapted for input of a calibration of the first frequency. The exemplary apparatus may enter calibration and testing modes in response to various commands such as a calibration mode signal, and may also be configured through one of the terminals for output frequency selection, spread-spectrum output, and output voltage levels.

    摘要翻译: 本发明的示例性实施例提供了具有三个或更多个端子的参考谐波振荡器集成电路,其具有使用有限数量的端子将谐波振荡器校准为所选择的第一频率的系统和方法。 示例性装置包括:参考谐波振荡器,用于接收电源电压的第一端子,用于接收地电位的第二端子,第三端子以提供具有输出频率的输出信号,并且还可以包括第四端子。 第一,第二,第三或第四端子中的一个进一步适于输入第一频率的校准。 示例性装置可以响应于诸如校准模式信号的各种命令而进入校准和测试模式,并且还可以通过用于输出频率选择,扩频输出和输出电压电平的一个端子进行配置。

    Discrete clock generator and timing/frequency reference
    17.
    发明申请
    Discrete clock generator and timing/frequency reference 有权
    离散时钟发生器和定时/频率参考

    公开(公告)号:US20060158268A1

    公开(公告)日:2006-07-20

    申请号:US11384973

    申请日:2006-03-20

    IPC分类号: H03L7/00

    摘要: In various embodiments, the invention provides a discrete clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which may then be provided to other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

    摘要翻译: 在各种实施例中,本发明提供使用LC振荡器拓扑的离散时钟发生器和/或定时和频率参考,其具有频率控制器来控制和提供稳定的谐振频率,然后可以将其提供给其它第二电路,例如 作为处理器或控制器。 提供了频率稳定性,如选择的参数(如温度和制造工艺变化)的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器,其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中,响应于温度波动将传感器实现为电流源,并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感,并且可以是二进制加权的。 还提供了电阻模块的阵列,以产生一个或多个控制电压。

    Semiconductor resonators with electromagnetic and environmental shielding and methods of forming same
    18.
    发明授权
    Semiconductor resonators with electromagnetic and environmental shielding and methods of forming same 有权
    具有电磁和环境屏蔽的半导体谐振器及其形成方法

    公开(公告)号:US08164159B1

    公开(公告)日:2012-04-24

    申请号:US12838158

    申请日:2010-07-16

    IPC分类号: H01L29/86

    摘要: A reference signal generator includes an integrated circuit substrate having a semiconductor resonator therein. The resonator includes an inductor extending adjacent a first surface of the integrated circuit substrate. A vertically-stacked composite of at least first and second electrically insulating dielectric layers is provided on the integrated circuit substrate. The vertically-stacked composite covers a portion of the first surface, which extends opposite the inductor. A first electrically conductive shielding layer is provided on a portion of the second electrically insulating dielectric layer extending opposite the inductor. The first electrically conductive shielding layer may encapsulate exposed portions of the first and second electrically insulating dielectric layers. The shielding layer may operate as an electromagnetic shield between the inductor and an external structure, such as an integrated circuit package, and also shield against environmental contamination (e.g., external moisture penetration).

    摘要翻译: 参考信号发生器包括其中具有半导体谐振器的集成电路基板。 谐振器包括在集成电路基板的第一表面附近延伸的电感器。 在集成电路基板上设置有至少第一和第二电绝缘介电层的垂直堆叠的复合材料。 垂直堆叠的复合物覆盖与电感器相对延伸的第一表面的一部分。 在与电感器相对延伸的第二电绝缘介电层的一部分上设置有第一导电屏蔽层。 第一导电屏蔽层可以封装第一和第二电绝缘介电层的暴露部分。 屏蔽层可以作为电感器和诸如集成电路封装的外部结构之间的电磁屏蔽来操作,并且还可以防止环境污染(例如,外部湿气穿透)。

    Integrated circuit devices using analog dividers
    19.
    发明授权
    Integrated circuit devices using analog dividers 有权
    使用模拟分频器的集成电路器件

    公开(公告)号:US08754719B1

    公开(公告)日:2014-06-17

    申请号:US13334535

    申请日:2011-12-22

    申请人: Justin O'Day

    发明人: Justin O'Day

    IPC分类号: H03B5/08

    CPC分类号: H03B19/14 H03K5/086 H03K23/50

    摘要: A divider for use in an integrated circuit chip, such as a clock generator chip, includes a ramp generator circuit configured to generate a ramp signal and a synchronous detector circuit configured to receive the ramp signal and an input clock signal and to responsively control the ramp signal generator circuit to generate an output clock signal at an output of the synchronous detector circuit. In some embodiments, the synchronous detector circuit may include a voltage threshold detector circuit configured to receive the ramp signal and to generate a detection signal responsive thereto and a synchronous latch circuit having a clock input configured to receive the input clock signal and a data input configured to receive the detection signal. The synchronous latch circuit may be configured to control the ramp generator circuit.

    摘要翻译: 用于诸如时钟发生器芯片的集成电路芯片中的分压器包括:斜坡发生器电路,其被配置为产生斜坡信号;以及同步检测器电路,其被配置为接收斜坡信号和输入时钟信号,并且响应地控制斜坡 信号发生器电路,以在同步检测器电路的输出端产生输出时钟信号。 在一些实施例中,同步检测器电路可以包括电压阈值检测器电路,其被配置为接收斜坡信号并响应于此产生检测信号;以及同步锁存电路,具有配置成接收输入时钟信号的时钟输入和配置的数据输入 以接收检测信号。 同步锁存电路可以被配置为控制斜坡发生器电路。

    Reconfigurable divider circuits with hybrid structure
    20.
    发明授权
    Reconfigurable divider circuits with hybrid structure 有权
    具有混合结构的可重构分频电路

    公开(公告)号:US08542040B1

    公开(公告)日:2013-09-24

    申请号:US13285103

    申请日:2011-10-31

    申请人: Justin O'Day

    发明人: Justin O'Day

    IPC分类号: H03B19/00

    CPC分类号: H03K23/00 H03K23/667

    摘要: An integrated circuit includes a first variable divider circuit configured to receive a clock signal and to apply a lower range of integer division factors thereto responsive to a first control input to generate a first divided clock signal and a second variable divider circuit configured to receive the clock signal and to apply an upper range of integer division factors thereto responsive to a second control input to generate a second divided clock signal. The integrated circuit further includes a multiplexer circuit configured to selectively pass the first and second divided clock signals responsive to a third control input.

    摘要翻译: 集成电路包括:第一可变分频器电路,被配置为接收时钟信号并且响应于第一控制输入而施加较低范围的整数分频因子以产生第一分频时钟信号;以及第二可变分频器电路,被配置为接收时钟 信号并且响应于第二控制输入施加整数除数因子的上限范围以产生第二分频时钟信号。 集成电路还包括复用器电路,其被配置为响应于第三控制输入选择性地传递第一和第二分频时钟信号。