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    Restoring virtualized GCU state information
    11.
    发明授权
    Restoring virtualized GCU state information 有权
    恢复虚拟化GCU状态信息

    公开(公告)号：US08938597B2

    公开(公告)日：2015-01-20

    申请号：US13658673

    申请日：2012-10-23

    Applicant: Seagate Technology LLC

    Inventor： Ryan James Goss ,  David Scott Seekins ,  Mark Allen Gaertner

    IPC: G06F12/00

    CPC classification number: G06F12/0261 ,  G06F12/0246 ,  G06F2212/702 ,  G06F2212/7205

    Abstract: Method and apparatus for managing a memory, such as but not limited to a flash memory. In accordance with some embodiments, initial state information is stored which identifies an actual state of a garbage collection unit (GCU) of a memory during a normal operational mode. During a restoration mode after a memory power cycle event, a virtualized state of the GCU is determined responsive to the initial state information and to data read from the GCU. The memory is transitioned from the restoration mode to the normal operational mode once the virtualized state for the GCU is determined.

    Abstract translation: 用于管理存储器的方法和装置，例如但不限于闪速存储器。 根据一些实施例，存储在正常操作模式期间识别存储器的垃圾回收单元（GCU）的实际状态的初始状态信息。 在存储器电源循环事件之后的恢复模式期间，响应于初始状态信息和从GCU读取的数据确定GCU的虚拟化状态。 一旦确定了GCU的虚拟化状态，存储器将从恢复模式转换到正常操作模式。

    ECC Management for Variable Resistance Memory Cells
    12.
    发明申请
    ECC Management for Variable Resistance Memory Cells 有权
    可变电阻存储单元的ECC管理

    公开(公告)号：US20140245108A1

    公开(公告)日：2014-08-28

    申请号：US13779434

    申请日：2013-02-27

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Mark Allen Gaertner ,  Ryan James Goss ,  Antoine Khoueir ,  Ara Patapoutian

    IPC: G06F11/10

    CPC classification number: G06F11/1048 ,  G06F11/1008 ,  G06F11/1044 ,  G11C13/0002 ,  G11C17/165

    Abstract: A data storage device may generally be constructed and operated with at least a controller configured to identify a variance from a predetermined threshold in at least one variable resistance memory cell and upgrade a first error correction code (ECC) level to a second ECC level for the at least one variable resistance memory cell.

    Abstract translation: 一般来说，数据存储设备可被构造和操作至少一个控制器，该控制器被配置为在至少一个可变电阻存储器单元中识别来自预定阈值的方差，并将第一纠错码（ECC）级别升级到第二ECC级别 至少一个可变电阻存储单元。

    Restoring Virtualized GCU State Information
    14.
    发明申请
    Restoring Virtualized GCU State Information 有权
    恢复虚拟GCU状态信息

    公开(公告)号：US20140115233A1

    公开(公告)日：2014-04-24

    申请号：US13658673

    申请日：2012-10-23

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Ryan James Goss ,  David Scott Seekins ,  Mark Allen Gaertner

    IPC: G06F12/02

    CPC classification number: G06F12/0261 ,  G06F12/0246 ,  G06F2212/702 ,  G06F2212/7205

    Abstract: Method and apparatus for managing a memory, such as but not limited to a flash memory. In accordance with some embodiments, initial state information is stored which identifies an actual state of a garbage collection unit (GCU) of a memory during a normal operational mode. During a restoration mode after a memory power cycle event, a virtualized state of the GCU is determined responsive to the initial state information and to data read from the GCU. The memory is transitioned from the restoration mode to the normal operational mode once the virtualized state for the GCU is determined.

    Abstract translation: 用于管理存储器的方法和装置，例如但不限于闪速存储器。 根据一些实施例，存储在正常操作模式期间识别存储器的垃圾回收单元（GCU）的实际状态的初始状态信息。 在存储器电源循环事件之后的恢复模式期间，响应于初始状态信息和从GCU读取的数据确定GCU的虚拟化状态。 一旦确定了GCU的虚拟化状态，存储器将从恢复模式转换到正常操作模式。

    Memory device with variable code rate
    18.
    发明授权
    Memory device with variable code rate 有权
    具有可变代码率的存储器件

    公开(公告)号：US09201728B2

    公开(公告)日：2015-12-01

    申请号：US14025327

    申请日：2013-09-12

    Applicant: Seagate Technology LLC

    Inventor： Ara Patapoutian ,  Ryan James Goss ,  Mark Allen Gaertner ,  Bruce Douglas Buch ,  Arvind Sridharan

    IPC: G06F11/10

    CPC classification number: G06F11/1012

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, the apparatus has a solid-state non-volatile memory and a processing circuit configured to write data to a selected location of the memory. The data are arranged in the form of multi-bit code words each comprising a user data payload and associated parity data configured to correct one or more bit errors in the user data payload. The processing circuit adjusts at least a selected one of a size of the code words, a size of the user data payloads or a size of the parity data responsive to at least a selected one of an accumulated count of access operations upon the selected location or an error rate associated with the selected location.

    Abstract translation: 用于管理诸如闪存之类的存储器中的数据的方法和装置。 根据一些实施例，该装置具有固态非易失性存储器和被配置为将数据写入存储器的选定位置的处理电路。 数据以多位码字的形式排列，每个码字包括用户数据有效载荷和被配置为校正用户数据有效载荷中的一个或多个位错误的相关联的奇偶校验数据。 所述处理电路至少根据所选择的位置的访问操作的累积计数中的至少一个来选择所述码字的大小，所述用户数据有效载荷的大小或所述奇偶校验数据的大小中的一个， 与所选位置相关联的错误率。

    COMMAND EXECUTION USING EXISTING ADDRESS INFORMATION
    20.
    发明申请
    COMMAND EXECUTION USING EXISTING ADDRESS INFORMATION 有权
    使用现有地址信息进行命令执行

    公开(公告)号：US20150089119A1

    公开(公告)日：2015-03-26

    申请号：US14034211

    申请日：2013-09-23

    Applicant: Seagate Technology LLC

    Inventor： Kris Conklin ,  Bruce Dunlop ,  Mark Allen Gaertner ,  Ryan James Goss

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F13/161 ,  G06F2212/1016 ,  G06F2212/7203

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a memory module has a plurality of solid-state non-volatile memory cells. A controller communicates a first command having address information and a first operation code. The first operation code identifies a first action to be taken by the memory module in relation to the address information. The controller subsequently communicates a second command having a second operation code without corresponding address information. The memory module takes a second action identified by the second command using the address information from the first command.

    Abstract translation: 用于管理诸如闪存之类的存储器中的数据的方法和装置。 根据一些实施例，存储器模块具有多个固态非易失性存储单元。 控制器传达具有地址信息的第一命令和第一操作码。 第一操作代码识别存储器模块相对于地址信息采取的第一动作。 控制器随后传送具有第二操作码的第二命令，而没有相应的地址信息。 存储器模块使用来自第一命令的地址信息采用由第二命令标识的第二动作。

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