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公开(公告)号：US11501695B2
公开(公告)日：2022-11-15
申请号：US17271221
申请日：2019-09-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Kei Takahashi , Susumu Kawashima , Koji Kusunoki , Kazunori Watanabe
IPC: G09G3/32
Abstract: The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.
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公开(公告)号：US11487373B2
公开(公告)日：2022-11-01
申请号：US17026446
申请日：2020-09-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Daisuke Kubota , Ryo Hatsumi , Taisuke Kamada , Koji Kusunoki , Kazunori Watanabe , Susumu Kawashima , Kensuke Yoshizumi
Abstract: A display device featuring a touch detection and a fingerprint imaging functions is provided. A display device includes a light-emitting element and a light-receiving element. The light-emitting element includes a first pixel electrode, a light-emitting layer, and a common electrode, and the light-receiving element includes a second pixel electrode, an active layer, and the common electrode. The first pixel electrode and the second pixel electrode are provided on the same plane. The common electrode overlaps with the first pixel electrode with the light-emitting layer therebetween, and overlaps with the second pixel electrode with the active layer therebetween. A first conductive layer, a second conductive layer, and an insulating layer are provided above the common electrode. The insulating layer is provided above the first conductive layer, and the second conductive layer is provided above the insulating layer. The light-receiving element has a function of receiving light emitted from the light-emitting element.
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公开(公告)号：US11355577B2
公开(公告)日：2022-06-07
申请号：US17003655
申请日：2020-08-26
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Kazunori Watanabe , Susumu Kawashima , Koji Kusunoki
IPC: H01L27/32 , G09G3/3233 , G09G3/3275 , G09G3/20
Abstract: A display device that can easily achieve higher definition is provided. The display device includes a pixel, a first wiring, and a second wiring. The pixel includes first to fourth transistors, a first capacitor, and a light-emitting element. One of a source and a drain of the first transistor is connected to the first wiring, and the other of the source and the drain of the first transistor is connected to a gate of the second transistor and to the first capacitor. The light-emitting element is connected to one of a source and a drain of the second transistor. The first wiring is supplied with a first data potential. The second wiring is supplied with a second data potential and a reset potential in different periods. The third transistor supplies the second data potential to the first capacitor. The fourth transistor supplies the reset potential to the light-emitting element.
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公开(公告)号：US11296176B2
公开(公告)日：2022-04-05
申请号：US16633402
申请日：2018-07-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Koji Kusunoki , Kazunori Watanabe , Susumu Kawashima , Kei Takahashi
Abstract: A novel display panel that is highly convenient or reliable is provided. A novel display device is provided. The display panel includes a display region, a first terminal region, and a second terminal region, and the first terminal region is provided not to block the display region and includes a region overlapping with the display region. The first terminal region includes a first group of terminals, and the first group of terminals includes a first terminal. The second terminal region includes a second group of terminals, and the second group of terminals includes a second terminal. The display region includes one group of pixels, another group of pixels, a scan line, and a signal line. The one group of pixels includes a pixel and is arranged in a row direction. The another group of pixels includes the pixel and is arranged in a column direction intersecting the row direction. The scan line is electrically connected to the one group of pixels. The signal line is electrically connected to the another group of pixels, and the signal line is electrically connected to the first terminal and the second terminal.
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公开(公告)号：US11087675B2
公开(公告)日：2021-08-10
申请号：US16758108
申请日：2018-11-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Susumu Kawashima , Koji Kusunoki , Kazunori Watanabe , Kouhei Toyotaka , Kei Takahashi , Kentaro Hayashi , Shunpei Yamazaki
IPC: G09G3/30 , G09G3/3225 , H01L27/32 , H01L29/786
Abstract: A display device that can display a high-luminance image is provided. The display device includes a display element and a memory circuit which is electrically connected to a first wiring and a second wiring. First, a reference potential is supplied to the first wiring. Next, a first image signal is supplied to the memory circuit through the second wiring. Then, the second image signal is added to the first image signal by supplying the second image signal to the memory circuit through the first wiring. After that, an image obtained by superimposing an image corresponding to the first image signal and an image corresponding to the second image signal on each other is displayed with the display element.
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Patent Agency Ranking
公开(公告)号：US10553726B2
公开(公告)日：2020-02-04
申请号：US15671199
申请日：2017-08-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Masashi Tsubuku , Kosei Noda , Kouhei Toyotaka , Kazunori Watanabe , Hikaru Harada
IPC: H01L29/786 , H01L27/108 , H01L27/11 , H01L27/12 , H01L49/02 , H01L29/24 , H01L29/417 , H01L29/423 , G06F15/76
Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
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公开(公告)号：US10009020B2
公开(公告)日：2018-06-26
申请号：US13716885
申请日：2012-12-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kazunori Watanabe , Hiroyuki Miyake
CPC classification number: H03K17/04 , G09G3/3648 , G09G3/3688 , G09G3/3696 , G09G5/001
Abstract: To suppress an adverse effect of change in held data in a sample-and-hold circuit as a result of increase in operation speed on a generated parallel data signal. A signal converter circuit includes a first sample-and-hold circuit and a second sample-and-hold circuit each of which has a function of extracting and holding part of a serial data signal as a data in accordance with a sampling control signal and has a function of generating a data signal which is one of data signals of a parallel data signal by using the held data and outputting the data signal. The second sample-and-hold circuit includes a switch which has a function of selecting whether the potential of the data of the second sample-and-hold circuit is set to a reference potential or not in accordance with the sampling control signal of the first sample-and-hold circuit.
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公开(公告)号：US20150149795A1
公开(公告)日：2015-05-28
申请号：US14608844
申请日：2015-01-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kazunori Watanabe
CPC classification number: H02M3/07 , G05F3/205 , G06F1/3234 , G06F1/3287 , G11C5/145 , G11C5/146 , H02M3/073 , H02M2003/078 , Y02D10/171
Abstract: To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled.
Abstract translation: 以减少晶体管的电特性的变化。 由电压转换器电路产生的电位被施加到包括在电压转换块中的晶体管的背栅极。 由于晶体管的背栅极不处于浮置状态，因此可以控制流过反向沟道的电流，以便减小晶体管的电特性的变化。 此外，使用具有低截止电流的晶体管作为包括在电压转换块中的晶体管，由此控制输出电位的存储。
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公开(公告)号：US20150054571A1
公开(公告)日：2015-02-26
申请号：US14457525
申请日：2014-08-12
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Kazunori Watanabe , Tomoaki Atsumi
IPC: H02M3/07
Abstract: Efficiency of a charge pump circuit is increased. The charge pump circuit includes serially connected fundamental circuits each including a diode-connected transistor and a capacitor. At least one transistor is provided with a back gate, and the back gate is connected to any node in the charge pump circuit. For example, the charge pump circuit is of a step-up type; in which case, if the transistor is an n-channel transistor, a back gate of the transistor in the last stage is connected to an output node of the charge pump circuit. Back gates of the transistors in the other stages are connected to an input node of the charge pump circuit. In this way, the voltage holding capability of the fundamental circuit in the last stage is increased, and the conversion efficiency can be increased because an increase in the threshold of the transistors in the other stages is prevented.
Abstract translation: 电荷泵电路的效率提高。 电荷泵电路包括串联连接的基本电路，每个基本电路包括二极管连接的晶体管和电容器。 至少一个晶体管设置有背栅极，并且后栅极连接到电荷泵电路中的任何节点。 例如，电荷泵电路是升压型的; 在这种情况下，如果晶体管是n沟道晶体管，则最后级的晶体管的背栅极连接到电荷泵电路的输出节点。 其他级的晶体管的背栅极连接到电荷泵电路的输入节点。 以这种方式，最后阶段的基本电路的电压保持能力增加，并且由于其它级的晶体管的阈值的增加被阻止，可以提高转换效率。
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20.发明授权Semiconductor device, image display device, storage device, and electronic device 有权半导体装置，图像显示装置，存储装置以及电子装置公开(公告)号：US08773173B2
公开(公告)日：2014-07-08
申请号：US13713323
申请日：2012-12-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kazunori Watanabe
CPC classification number: H03K17/00 , G09G3/3266 , G09G3/3677
Abstract: To provide a semiconductor device with reduced power consumption that includes a selection transistor. To provide a semiconductor device capable of high-speed operation without increasing a power supply potential. A buffer circuit connected to a gate line has a function of generating a potential higher than a high power supply potential by using the high power supply potential and outputs the potential in response to a selection signal. Specifically, a bootstrap circuit boosts a high power supply potential that is input to an inverter that is the closest to an output side in the buffer circuit. Further, the bootstrap circuit boosts the potential when the gate line is selected, and does not boost the potential when the gate line is not selected.
Abstract translation: 提供具有降低功耗的半导体器件，其包括选择晶体管。 提供能够高速运行而不增加电源电位的半导体器件。 连接到栅极线的缓冲电路具有通过使用高电源电位产生高于高电源电位的电位的功能，并且响应于选择信号输出电位。 具体来说，自举电路将输入到最靠近缓冲电路的输出侧的反相器的高电源电位提升。 此外，当选择栅极线时，自举电路提高电位，并且在不选择栅极线时不提高电位。
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