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11.
公开(公告)号:US11488671B2
公开(公告)日:2022-11-01
申请号:US17351200
申请日:2021-06-17
Applicant: Silicon Motion, Inc.
Inventor: Che-Wei Hsu , Hsin-Hsiang Tseng
Abstract: A memory device includes a non-volatile (NV) memory including a plurality of NV memory elements. A method for performing programming management of the NV memory includes: setting a programming sequence of the NV memory elements; determining a selection interval between each of the NV memory elements according to the programming sequence and a serial number of each of the NV memory elements; for a target NV memory element of the plurality of NV memory elements in the programming sequence, determining a serial number of an immediately previous NV memory element in the programming sequence according to the selection interval and a serial number of the target NV memory element; determining whether the immediately previous NV memory element is in a busy state; and only when the immediately previous NV memory element is not in the busy state, programming the target NV memory element.
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公开(公告)号:US11314586B2
公开(公告)日:2022-04-26
申请号:US16774300
申请日:2020-01-28
Applicant: Silicon Motion, Inc.
Inventor: Ting-Han Lin , Che-Wei Hsu
Abstract: Mapping information management for data storage. A mapping information format without any uncorrectable flag bits (UNC bits) is shown. A controller provides a cyclic redundancy check (CRC) engine. In response to an uncorrectable marking command issued by a host, the controller operates the cyclic redundancy check engine to encode a data pattern with a biased encoding seed to generate biased cyclic redundancy check code. The controller programs the data pattern and the biased cyclic redundancy check code to the non-volatile memory. The data pattern, therefore, will not pass CRC. The uncorrectable marking command works.
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13.
公开(公告)号:US11069409B2
公开(公告)日:2021-07-20
申请号:US15859709
申请日:2018-01-01
Applicant: Silicon Motion Inc.
Inventor: Che-Wei Hsu , Hsin-Hsiang Tseng
Abstract: A method for performing programming management, associated memory device and a controller thereof are provided. The memory device may include a non-volatile (NV) memory, and the NV memory may include a plurality of NV memory elements. The method may include: before programming a target NV memory element of the plurality of NV memory elements, checking whether another NV memory element of the plurality of NV memory elements is in a busy state or in a non-busy state; and when the other NV memory element enters the non-busy state, programming the target NV memory element.
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公开(公告)号:US11036646B2
公开(公告)日:2021-06-15
申请号:US16560033
申请日:2019-09-04
Applicant: Silicon Motion, Inc.
Inventor: Che-Wei Hsu , Hui-Ping Ku
IPC: G06F12/1009
Abstract: A data storage device is provided. The data storage device includes: a flash memory, a dynamic random access memory (DRAM), and a memory controller. The flash memory stores a logical-to-physical mapping (L2P) table that is divided into a plurality of group-mapping tables. The memory controller receives a host command from a host, wherein the host command includes one or more pieces of data and one or more corresponding logical addresses. The memory controller writes the data of the host command into active blocks of the flash memory. In response to the memory controller changing the active blocks into unsaved data blocks and a number of the unsaved data blocks being greater than or equal to an unsaved data block count threshold, the memory controller segmentally updates mapping relationships of the data in the unsaved data blocks, and writes the updated group-mapping tables into the flash memory.
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公开(公告)号:US10185662B2
公开(公告)日:2019-01-22
申请号:US15657697
申请日:2017-07-24
Applicant: Silicon Motion, Inc.
Inventor: Che-Wei Hsu
IPC: G11C11/56 , G06F12/02 , G06F12/0802 , G11C16/04
Abstract: A method for reprogramming data, performed by a processing unit, is disclosed to include at least the following steps. When a page data has failed to be programmed into a first block of a storage unit and the failed page is an upper page of the first block, a host page number associated with a first lower page of memory cells of the first block of a wordline is obtained, where the memory cells comprises the failed page. When the failed page is an upper page, data from the first lower page to the upper page of the first block is programmed into a second block of the storage unit.
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16.
公开(公告)号:US10162759B2
公开(公告)日:2018-12-25
申请号:US15689767
申请日:2017-08-29
Applicant: Silicon Motion, Inc.
Inventor: Yang-Chih Shen , Che-Wei Hsu
IPC: G06F12/08 , G06F12/0873
Abstract: The invention introduces a method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.
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公开(公告)号:US20170322880A1
公开(公告)日:2017-11-09
申请号:US15657697
申请日:2017-07-24
Applicant: Silicon Motion, Inc.
Inventor: Che-Wei Hsu
IPC: G06F12/0802 , G06F12/02 , G11C11/56 , G11C16/04
CPC classification number: G06F12/0802 , G06F12/0246 , G06F2212/1016 , G06F2212/1032 , G06F2212/1036 , G06F2212/205 , G06F2212/7209 , G06F2212/7211 , G11C11/5628 , G11C16/0483
Abstract: A method for reprogramming data, performed by a processing unit, is disclosed to include at least the following steps. When a page data has failed to be programmed into a first block of a storage unit and the failed page is an upper page of the first block, a host page number associated with a first lower page of memory cells of the first block of a wordline is obtained, where the memory cells comprises the failed page. When the failed page is an upper page, data from the first lower page to the upper page of the first block is programmed into a second block of the storage unit.
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18.
公开(公告)号:US09779022B2
公开(公告)日:2017-10-03
申请号:US14738464
申请日:2015-06-12
Applicant: Silicon Motion, Inc.
Inventor: Yang-Chih Shen , Che-Wei Hsu
IPC: G06F12/08 , G06F12/0873
CPC classification number: G06F12/0873 , G06F2212/1021 , G06F2212/313 , G06F2212/608
Abstract: A method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.
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公开(公告)号:US11199982B2
公开(公告)日:2021-12-14
申请号:US16505231
申请日:2019-07-08
Applicant: Silicon Motion, Inc.
Inventor: Ting-Han Lin , Che-Wei Hsu
Abstract: High-efficiency control technology for non-volatile memory is shown. A controller allocates spare blocks of a non-volatile memory to provide a first active block and writes data issued by a host to the first active block. When the number of spare blocks is less than a threshold number and valid data of a first source block is less than a critical data amount, the controller uses the first active block as a data transfer destination for the valid data from the first source block.
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20.
公开(公告)号:US20210312990A1
公开(公告)日:2021-10-07
申请号:US17351200
申请日:2021-06-17
Applicant: Silicon Motion, Inc.
Inventor: Che-Wei Hsu , Hsin-Hsiang Tseng
Abstract: A memory device includes a non-volatile (NV) memory including a plurality of NV memory elements. A method for performing programming management of the NV memory includes: setting a programming sequence of the NV memory elements; determining a selection interval between each of the NV memory elements according to the programming sequence and a serial number of each of the NV memory elements; for a target NV memory element of the plurality of NV memory elements in the programming sequence, determining a serial number of an immediately previous NV memory element in the programming sequence according to the selection interval and a serial number of the target NV memory element; determining whether the immediately previous NV memory element is in a busy state; and only when the immediately previous NV memory element is not in the busy state, programming the target NV memory element.
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