Methods for phased garbage collection using phased garbage collection block or scratch pad block as a buffer
    11.
    发明申请
    Methods for phased garbage collection using phased garbage collection block or scratch pad block as a buffer 有权
    使用分阶段垃圾收集块或便笺块作为缓冲区的分阶段垃圾收集方法

    公开(公告)号:US20080086619A1

    公开(公告)日:2008-04-10

    申请号:US11541035

    申请日:2006-09-28

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0269

    摘要: A method for phased garbage collection is provided. In this method, a write command is received to write data. The write command is allocated a timeout period to complete an execution of the write command. Thereafter, a busy signal is asserted and a portion of a garbage collection operation is performed for a garbage collection time period. The data are written to a block and the busy signal is released before the timeout period.

    摘要翻译: 提供了一种分阶段垃圾收集方法。 在该方法中,接收写入命令以写入数据。 写命令被分配一个超时周期以完成写入命令的执行。 此后,确定忙信号,并且在垃圾收集时间段内执行垃圾收集操作的一部分。 数据被写入一个块,并且在超时时间段之前释放忙信号。

    Methods for phased garbage collection
    12.
    发明申请
    Methods for phased garbage collection 有权
    分阶段垃圾收集方法

    公开(公告)号:US20080034175A1

    公开(公告)日:2008-02-07

    申请号:US11499606

    申请日:2006-08-04

    IPC分类号: G06F13/00 G06F12/00

    摘要: A method for operating a non-volatile memory storage system is provided. In this method, a write command is received to write data. The write command is allocated a timeout period to complete an execution of the write command. Within the timeout period, a portion of a garbage collection operation is performed. The data associated with the write command are written to a buffer associated with the non-volatile memory storage system.

    摘要翻译: 提供了一种用于操作非易失性存储器存储系统的方法。 在该方法中,接收写入命令以写入数据。 写命令被分配一个超时周期以完成写入命令的执行。 在超时期间内,执行垃圾收集操作的一部分。 与写入命令相关联的数据被写入与非易失性存储器系统相关联的缓冲器。

    System, method and memory device providing data scrambling compatible with on-chip copy operation
    13.
    发明授权
    System, method and memory device providing data scrambling compatible with on-chip copy operation 有权
    提供与片上复制操作兼容的数据扰乱的系统,方法和存储器件

    公开(公告)号:US08301912B2

    公开(公告)日:2012-10-30

    申请号:US12345921

    申请日:2008-12-30

    IPC分类号: G06F12/14

    摘要: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.

    摘要翻译: 公开了在闪速存储器件外部实现的数据加扰技术,其可以与在闪存器件内部操作的闪存片上复制功能一起使用,从而支持高性能复制操作。 存储在闪存中的所有数据可能被加扰,包括报头和控制结构。 可以实现强大的文件系统操作,包括在任何时候容忍功率损耗的能力,并且还能够在闪存内部重新定位数据,而不必去除数据,然后重新加扰数据。 基于硬件的示例性解决方案对整个系统性能几乎没有或没有影响,并且可以以非常低的增量成本实现,以提高整体系统的可靠性。 数据加扰技术优选地使用诸如逻辑块地址或逻辑页地址的逻辑地址而不是物理地址来确定种子加密密钥。

    Mapping address table maintenance in a memory device
    14.
    发明授权
    Mapping address table maintenance in a memory device 有权
    映射存储设备中的地址表维护

    公开(公告)号:US08250333B2

    公开(公告)日:2012-08-21

    申请号:US12348782

    申请日:2009-01-05

    IPC分类号: G06F12/12

    摘要: A method and system maintains an address table for mapping logical groups to physical addresses in a memory device. The method includes receiving a request to set an entry in the address table and selecting and flushing entries in an address table cache depending on the existence of the entry in the cache and whether the cache meets a flushing threshold criteria. The flushed entries include less than the maximum capacity of the address table cache. The flushing threshold criteria includes whether the address table cache is full or if a page exceeds a threshold of changed entries. The address table and/or the address table cache may be stored in a non-volatile memory and/or a random access memory. Improved performance may result using this method and system due to the reduced number of write operations and time needed to partially flush the address table cache to the address table.

    摘要翻译: 方法和系统维护用于将逻辑组映射到存储器设备中的物理地址的地址表。 该方法包括接收在地址表中设置条目的请求,并根据高速缓存中的条目的存在以及高速缓存是否满足冲洗阈值标准来选择和刷新地址表高速缓存中的条目。 刷新的条目包括小于地址表缓存的最大容量。 刷新阈值标准包括地址表缓存是否满或页面是否超过已更改条目的阈值。 地址表和/或地址表缓存可以存储在非易失性存储器和/或随机存取存储器中。 由于将地址表缓存部分刷新到地址表所需的写入操作次数和时间减少,因此可能会导致使用此方法和系统的性能提高。

    Methods for conversion of update blocks based on comparison with a threshold size
    15.
    发明授权
    Methods for conversion of update blocks based on comparison with a threshold size 有权
    基于与阈值大小的比较来转换更新块的方法

    公开(公告)号:US07904670B2

    公开(公告)日:2011-03-08

    申请号:US11725628

    申请日:2007-03-19

    申请人: Shai Traister

    发明人: Shai Traister

    IPC分类号: G06F12/06

    摘要: A method for operating a memory system is provided. In this method, a write command is received to write data following a previous write command. The write command and the previous write command have a discontinuity in logical addresses and the discontinuity in logical addresses defines a gap between a logical address of the write command and a logical address of the previous write command. Here, a sequential update block and preexisting data associated with the sequential update block are provided. The gap is compared with a threshold size and the data are written to the sequential update block if the gap is less than the threshold size.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,接收写入命令以在先前写入命令之后写入数据。 写入命令和先前的写入命令在逻辑地址中具有不连续性,逻辑地址中的不连续性定义了写入命令的逻辑地址与先前写入命令的逻辑地址之间的间隙。 这里,提供顺序更新块和与顺序更新块相关联的预先存在的数据。 将间隙与阈值大小进行比较,并且如果间隙小于阈值大小,则将数据写入顺序更新块。

    DYNAMIC METABLOCKS
    16.
    发明申请
    DYNAMIC METABLOCKS 有权
    动态代号

    公开(公告)号:US20090089482A1

    公开(公告)日:2009-04-02

    申请号:US11864629

    申请日:2007-09-28

    申请人: Shai Traister

    发明人: Shai Traister

    摘要: A nonvolatile block erasable memory array links erase blocks together for programming with high parallelism as a metablock. Erase blocks are operated in banks, with each bank having a dedicated bus and controller. Sub-metablocks of different metablocks, in different banks, are accessed in parallel allowing different metablocks to be updated at the same time.

    摘要翻译: 非易失性块可擦除存储器阵列将擦除块链接在一起,以高并行性作为元区块进行编程。 擦除块在银行中运行,每个库具有专用总线和控制器。 并行访问不同库中不同元区块的子元区块,允许不同的元区块同时更新。

    SCHEDULING METHODS OF PHASED GARBAGE COLLECTION AND HOUSE KEEPING OPERATIONS IN A FLASH MEMORY SYSTEM
    17.
    发明申请
    SCHEDULING METHODS OF PHASED GARBAGE COLLECTION AND HOUSE KEEPING OPERATIONS IN A FLASH MEMORY SYSTEM 有权
    闪存存储器系统中相位收集和房间保持操作的调度方法

    公开(公告)号:US20090006719A1

    公开(公告)日:2009-01-01

    申请号:US11769033

    申请日:2007-06-27

    申请人: Shai Traister

    发明人: Shai Traister

    IPC分类号: G06F12/00

    摘要: An embodiment of a non-volatile memory storage system comprises a memory controller, and a flash memory module. The memory controller manages the storage operations of the flash memory module. The memory controller is configured to assign a priority level to one or more types of house keeping operations that may be higher than a priority level of one or more types of commands received by a host coupled to the storage system, and to service all operations required of the flash memory module according to priority.

    摘要翻译: 非易失性存储器存储系统的实施例包括存储器控制器和闪速存储器模块。 存储器控制器管理闪存模块的存储操作。 存储器控制器被配置为将优先级分配给可以高于由耦合到存储系统的主机接收的一种或多种类型的命令的优先级别的一种或多种类型的房屋保持操作,并且服务于所需的所有操作 的闪存模块。

    Non-volatile memory storage systems for phased garbage collection
    18.
    发明授权
    Non-volatile memory storage systems for phased garbage collection 有权
    用于分阶段垃圾收集的非易失性存储器存储系统

    公开(公告)号:US07451265B2

    公开(公告)日:2008-11-11

    申请号:US11499598

    申请日:2006-08-04

    IPC分类号: G06F12/00

    摘要: A non-volatile memory storage system is provided. The non-volatile memory storage system includes a memory configured to store a storage system firmware and a non-volatile memory cell array configured to maintain a buffer. A processor in communication with the memory and the non-volatile memory cell array also is included in the non-volatile memory storage system. Here, the processor is configured to execute the storage system firmware stored in the memory. The storage system firmware comprises program instructions for receiving a write command to write data to the non-volatile memory cell array. The write command is allocated a timeout period to complete an execution of the write command. The storage system firmware also comprises program instructions for performing a portion of a garbage collection operation within the timeout period and for storing the data in the buffer.

    摘要翻译: 提供了非易失性存储器存储系统。 非易失性存储器存储系统包括被配置为存储被配置为维持缓冲器的存储系统固件和非易失性存储单元阵列的存储器。 与存储器和非易失性存储单元阵列通信的处理器也包括在非易失性存储器存储系统中。 这里,处理器被配置为执行存储在存储器中的存储系统固件。 存储系统固件包括用于接收写入命令以将数据写入非易失性存储单元阵列的程序指令。 写命令被分配一个超时周期以完成写入命令的执行。 存储系统固件还包括用于在超时时间段内执行垃圾收集操作的一部分并用于将数据存储在缓冲器中的程序指令。

    Systems for storing memory operations in a queue
    19.
    发明申请
    Systems for storing memory operations in a queue 审中-公开
    将存储器操作存储在队列中的系统

    公开(公告)号:US20080235480A1

    公开(公告)日:2008-09-25

    申请号:US11726646

    申请日:2007-03-21

    申请人: Shai Traister

    发明人: Shai Traister

    IPC分类号: G06F12/00

    摘要: A non-volatile memory storage system is provided. The non-volatile memory storage system is configured to store a queue. Here, the queue is configured to store memory operations associated with two or more types of memory operations. The memory operations are associated with maintenance of the non-volatile memory storage system. The non-volatile memory storage system further comprises a processor in communication with the non-volatile memory cell array. The processor is configured to schedule a memory operation for execution in response to an event and store the memory operation in the queue.

    摘要翻译: 提供了非易失性存储器存储系统。 非易失性存储器存储系统被配置为存储队列。 这里,队列被配置为存储与两种或多种类型的存储器操作相关联的存储器操作。 存储器操作与非易失性存储器存储系统的维护相关联。 非易失性存储器存储系统还包括与非易失性存储器单元阵列通信的处理器。 处理器被配置为调度用于响应于事件的执行的存储器操作并将存储器操作存储在队列中。

    Methods for conversion of update blocks based on association with host file management data structures
    20.
    发明申请
    Methods for conversion of update blocks based on association with host file management data structures 有权
    基于与主机文件管理数据结构的关联来转换更新块的方法

    公开(公告)号:US20080235439A1

    公开(公告)日:2008-09-25

    申请号:US11725746

    申请日:2007-03-19

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A method for operating a memory system is provided. In this method, a sequential update block is provided and a write command is received to write data. The write command comprises a logical address associated with the data. If the logical address is associated with a host file management data structure, then the sequential update block is converted to a chaotic update block. After the conversion, the data are written to the chaotic update block.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,提供顺序更新块,并且接收写入命令以写入数据。 写命令包括与数据相关联的逻辑地址。 如果逻辑地址与主机文件管理数据结构相关联,则将顺序更新块转换为混沌更新块。 转换后,将数据写入混沌更新块。