公开(公告)号：US08729616B2

公开(公告)日：2014-05-20

申请号：US13718485

申请日：2012-12-18

Applicant: Texas Instruments Incorporated

Inventor： Imran Mahmood Khan ,  Allan T. Mitchell ,  Kaiping Liu

IPC: H01L29/94

CPC classification number: H01L29/94 ,  G11C27/005 ,  G11C2216/10 ,  H01L27/1156 ,  H01L27/11803 ,  H01L28/40 ,  H01L28/60 ,  H01L29/7883 ,  H01L29/8616

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract translation: 集成电路中的模拟浮栅电极及其制造方法，其中捕获的电荷可以长时间存储。 模拟浮栅电极形成为多晶硅栅极电平，并且包括用作晶体管栅电极的部分，金属对多晶硅存储电容器的板以及多至多晶硅隧道电容器的板。 硅化物阻挡二氧化硅阻止在电极上形成硅化物包层，而集成电路中的其它多晶硅结构是硅化物包覆的。

公开(公告)号：US08980723B2

公开(公告)日：2015-03-17

申请号：US13918430

申请日：2013-06-14

Applicant: Texas Instruments Incorporated

Inventor： Kaiping Liu ,  Imran Mahmood Khan ,  Richard Allen Faust

IPC: H01L21/20 ,  H01L23/48 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L28/60 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31116 ,  H01L21/486 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/481 ,  H01L23/50 ,  H01L23/5223 ,  H01L23/5228 ,  H01L23/5329 ,  H01L23/53295 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.

Abstract translation: 具有不同深度的通孔的集成电路在具有不同厚度的蚀刻停止层上停止。 同时蚀刻具有不同深度的通孔的方法，而不会对通孔所接触的材料造成蚀刻损伤。

公开(公告)号：US20130130450A1

公开(公告)日：2013-05-23

申请号：US13718485

申请日：2012-12-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Imran Mahmood Khan ,  Allan T. Mitchell ,  Kaiping Liu

IPC: H01L29/94

CPC classification number: H01L29/94 ,  G11C27/005 ,  G11C2216/10 ,  H01L27/1156 ,  H01L27/11803 ,  H01L28/40 ,  H01L28/60 ,  H01L29/7883 ,  H01L29/8616

Abstract: An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.

Abstract translation: 集成电路中的模拟浮栅电极及其制造方法，其中捕获的电荷可以长时间存储。 模拟浮栅电极形成为多晶硅栅极电平，并且包括用作晶体管栅电极的部分，金属对多晶硅存储电容器的板以及多至多晶硅隧道电容器的板。 硅化物阻挡二氧化硅阻止在电极上形成硅化物包层，而集成电路中的其它多晶硅结构是硅化物包覆的。