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公开(公告)号:US20180358366A1
公开(公告)日:2018-12-13
申请号:US15807666
申请日:2017-11-09
IPC分类号: H01L27/1156
CPC分类号: H01L27/1156 , H01L27/11558 , H01L27/1211 , H01L29/42324
摘要: A method fabricates a lateral non-volatile storage cell. The lateral non-volatile storage cell includes a first transistor including a first transistor body formed on a dielectric layer. The first transistor includes a source region and drain region on opposite sides of the first transistor body. A second transistor is laterally adjacent to the first transistor and includes a second transistor body, parallel with the first transistor body, formed on the dielectric layer. A first layer of gate oxide of a first thickness is formed over the first transistor body, and a second layer of gate oxide of a second thickness is formed over a portion of the second transistor body. The first thickness and the second thickness are different. A floating gate is formed over the first layer of gate oxide, the second layer of gate oxide, and the dielectric layer.
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公开(公告)号:US20180286864A1
公开(公告)日:2018-10-04
申请号:US15995204
申请日:2018-06-01
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: H01L27/105 , H01L29/786 , H01L27/108 , H01L27/11551 , H01L27/1156 , H01L29/24 , H01L27/12 , G11C13/00 , H01L49/02 , H01L27/11
CPC分类号: H01L27/1052 , G11C13/0007 , G11C13/003 , G11C2213/79 , H01L27/105 , H01L27/108 , H01L27/11 , H01L27/11551 , H01L27/1156 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L28/40 , H01L29/24 , H01L29/7869 , H01L29/78696
摘要: An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.
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公开(公告)号:US10074663B2
公开(公告)日:2018-09-11
申请号:US15278546
申请日:2016-09-28
发明人: Kiyoshi Kato
IPC分类号: H01L21/336 , H01L27/11551 , G11C16/04 , H01L27/06 , H01L27/11521 , H01L27/1156 , H01L27/12 , H01L49/02 , H01L29/04 , H01L29/16 , H01L29/24 , H01L29/78 , H01L29/786
CPC分类号: H01L27/1207 , G11C16/0466 , H01L27/0688 , H01L27/11521 , H01L27/11551 , H01L27/1156 , H01L27/1225 , H01L28/60 , H01L29/04 , H01L29/16 , H01L29/24 , H01L29/78 , H01L29/7869
摘要: An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the semiconductor layer having the channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction.
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公开(公告)号:US10019348B2
公开(公告)日:2018-07-10
申请号:US14971636
申请日:2015-12-16
发明人: Naoaki Tsutsui
CPC分类号: G06F12/02 , H01L27/0688 , H01L27/1104 , H01L27/1156 , H02J1/00 , H02J13/0003
摘要: A novel semiconductor device or a semiconductor device whose power consumption can be reduced is provided. The semiconductor device includes a sensor portion, a memory portion, and a control portion. The memory portion has functions of storing multiple detection data and sending them to the control portion. Therefore, a certain amount of detection data acquired through sensing by the sensor portion can be held, and the detection data can be sent to the control portion at a desired timing. Accordingly, in the semiconductor device, the control portion does not need to operate every time information is acquired, and thus, the power supply to the control portion can be completely or partially stopped.
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公开(公告)号:US10002866B2
公开(公告)日:2018-06-19
申请号:US15298306
申请日:2016-10-20
发明人: Tetsuhiro Tanaka , Yutaka Okazaki
IPC分类号: H01L27/07 , H01L27/12 , H01L29/94 , H01L29/786 , H05K1/18 , H01G4/10 , H01G4/008 , H01L29/66 , H01L21/8258 , H01L27/06 , H01L27/115 , H01G4/40 , H01L27/1156
CPC分类号: H01L27/0733 , H01G4/008 , H01G4/105 , H01G4/40 , H01L21/8258 , H01L27/0629 , H01L27/0688 , H01L27/1156 , H01L27/1225 , H01L27/1255 , H01L29/66477 , H01L29/78648 , H01L29/7869 , H01L29/78696 , H01L29/94 , H05K1/18 , H05K2201/10015 , H05K2201/10083 , H05K2201/10166
摘要: A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.
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公开(公告)号:US09979386B2
公开(公告)日:2018-05-22
申请号:US14631366
申请日:2015-02-25
IPC分类号: G11C11/41 , H03K17/687 , H03K3/356 , H01L29/786 , H01L27/11 , H01L27/1156 , G11C11/417 , G11C14/00 , H01L27/12 , G11C5/14
CPC分类号: H03K17/6871 , G11C5/141 , G11C5/148 , G11C11/417 , G11C14/0054 , H01L27/1108 , H01L27/1156 , H01L27/1225 , H01L29/78648 , H01L29/7869 , H01L29/78696 , H03K3/356008
摘要: A semiconductor device that suppresses operation delay due to stop and restart of the supply of a power supply potential is provided. A potential corresponding to data held while power supply potential is continuously supplied is backed up in a node connected to a capacitor while the supply of the power supply potential is stopped. Then, by utilizing change in resistance of a channel in a transistor whose gate is the node, the data is restored with restart of the supply of the power supply potential. Note that by supplying a high potential to the node before the data back up, high-speed and accurate data back up is possible.
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公开(公告)号:US09905557B2
公开(公告)日:2018-02-27
申请号:US14445515
申请日:2014-07-29
发明人: Toshihiko Saito , Kiyoshi Kato , Atsuo Isobe
IPC分类号: H01L29/78 , H01L27/06 , H01L29/40 , H01L29/786 , H01L27/1156 , H01L27/12 , G11C16/04 , H01L21/02 , H01L29/423
CPC分类号: H01L27/0688 , G11C16/0433 , H01L21/02565 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L29/408 , H01L29/4236 , H01L29/78 , H01L29/7869 , H01L29/78696
摘要: A connection electrode for connecting a transistor including a semiconductor material other than an oxide semiconductor to a transistor including an oxide semiconductor material is smaller than an electrode of the transistor including a semiconductor material other than an oxide semiconductor that is connected to the connection electrode.
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公开(公告)号:US09825037B2
公开(公告)日:2017-11-21
申请号:US15359873
申请日:2016-11-23
IPC分类号: G11C5/06 , H01L27/105 , G11C11/404 , G11C11/405 , G11C16/04 , H01L27/11521 , H01L27/1156 , H01L27/12 , H01L27/108 , G11C16/08 , G11C16/24 , H01L29/786 , H01L21/02 , H01L21/425 , H01L21/441 , H01L21/477 , H01L27/11526 , H01L29/66 , G11C11/4091
CPC分类号: H01L27/1052 , G11C11/404 , G11C11/405 , G11C11/4091 , G11C16/0408 , G11C16/08 , G11C16/24 , H01L21/02565 , H01L21/02631 , H01L21/425 , H01L21/441 , H01L21/477 , H01L27/108 , H01L27/11521 , H01L27/11526 , H01L27/1156 , H01L27/1207 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L29/66969 , H01L29/78651 , H01L29/7869 , H01L29/78696
摘要: A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
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公开(公告)号:US09818473B2
公开(公告)日:2017-11-14
申请号:US14656082
申请日:2015-03-12
发明人: Naoaki Tsutsui
IPC分类号: G11C11/41 , H01L27/12 , H01L29/78 , H01L27/11 , G11C5/02 , H01L21/82 , H01L27/10 , H01L27/08 , H01L27/06 , G11C11/417 , H01L29/786 , H01L27/088 , H01L27/108 , H01L27/11526 , H01L21/8258 , H01L27/1156 , G11C11/412
CPC分类号: G11C11/41 , G11C5/025 , G11C11/412 , G11C11/417 , H01L21/8258 , H01L27/0688 , H01L27/088 , H01L27/10897 , H01L27/1108 , H01L27/11526 , H01L27/1156 , H01L27/1207 , H01L29/786 , H01L29/7869
摘要: This invention provides a semiconductor device with high speed operation and reduced size. A circuit includes a circuit including a memory circuit and a circuit including a logic circuit; thus, the circuit functions as a memory device having a function of storing data and a function of performing logic operation. The circuit can output, in addition to data stored in the circuit, data corresponding to a result of logic operation performed using data stored in the circuit as an input signal. The circuit can directly obtain a result of logic operation from the circuit, and thus, the frequency of input/output of a signal performed between the circuit and the circuit can be reduced.
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公开(公告)号:US20170271337A1
公开(公告)日:2017-09-21
申请号:US15477144
申请日:2017-04-03
发明人: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC分类号: H01L27/105 , G11C11/24
CPC分类号: H01L27/105 , G11C11/24 , H01L27/1052 , H01L27/108 , H01L27/10808 , H01L27/1156 , H01L27/1225 , H01L28/60
摘要: A semiconductor device including a non-volatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written or rewritten to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that the predetermined amount of charge is held in the node. Further, when a transistor whose threshold voltage is controlled and set to a positive voltage is used as the reading transistor, a reading potential is a positive potential.
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