Time-to-digital converter stop time control

    公开(公告)号:US11196426B2

    公开(公告)日:2021-12-07

    申请号:US17087978

    申请日:2020-11-03

    Abstract: In described examples, an electronic circuit for determining a phase difference between a first clock signal and a second clock signal includes a timer circuit, circuitry for generating a selectively delayed transition of the second clock signal, and phase determination circuitry. The timer circuit produces an elapsed time between a transition of the first clock signal and the selectively delayed transition of the second clock signal. The circuitry for generating the selectively delayed transition of the second clock signal generates the selectively delayed transition in response to a random selection of a respective output from a plurality of second clock signal delay stages. The phase determination circuitry provides the phase difference in response to the elapsed time and the random selection of a respective output from a plurality of second clock signal delay stages.

    ELECTRONIC DEVICE AND METHOD FOR LOW POWER RF RANGING

    公开(公告)号:US20210215812A1

    公开(公告)日:2021-07-15

    申请号:US17216866

    申请日:2021-03-30

    Abstract: Electronic devices and methods to provide wireless ranging are shown. A first electronic device includes a memory containing stored instructions that can perform a method for determining a distance between the first electronic device and a second electronic device. For each frequency in a selected set of frequencies, the method sets the transceiver to the respective frequency, sends a first tone having the frequency and a first phase to the second electronic device and receives a second tone having the first frequency and a second phase. For each selected frequency, the first electronic device determines the phase difference between the second tone and the controllable oscillator, receives a phase difference from the second electronic device, and calculates a phase delay for the frequency. The first electronic device calculates a phase delay difference for pairs of the frequencies; and determines the distance using these phase delay differences.

    Low power software defined radio (SDR)

    公开(公告)号:US09928199B2

    公开(公告)日:2018-03-27

    申请号:US14242404

    申请日:2014-04-01

    CPC classification number: G06F13/4022 H04L49/101 Y02D10/14 Y02D10/151

    Abstract: A communication apparatus comprising a plurality of signal processing units configured to perform a set of pre-determined signal processing functions according to a set of parameters, a plurality of programmable crossbars coupled to the plurality of signal processing units, and a plurality of control processors coupled to the plurality of programmable crossbars and configured to adjust the plurality of programmable crossbars to interconnect the signal processing units to implement a selected communication protocol, wherein at least one of the programmable crossbars routes data from a first of the plurality of signal processing units to a second of the plurality of signal processing units forming a data path without interception from the plurality of control processors.

    WAKEUP RECEIVER
    14.
    发明申请

    公开(公告)号:US20250119171A1

    公开(公告)日:2025-04-10

    申请号:US18650605

    申请日:2024-04-30

    Abstract: A circuit includes a receiver configured to couple to an antenna, configured to have a wakeup mode and an active mode, and to transition from the wakeup mode to the active mode in response to a wakeup signal received through the antenna. The receiver includes an impedance matching circuit coupled with the antenna, a low-noise amplifier coupled with the impedance matching circuit, a mixer coupled with the low-noise amplifier, a radio-frequency reference clock generator coupled with the mixer, a low-pass filter coupled with the mixer, an analog-to digital-converter coupled with the low-pass filter, and a control circuit configured to transition the receiver from the wakeup mode to the active mode in response to the wakeup signal. The low-noise amplifier, the mixer, the radio frequency reference clock generator, and the analog-to-digital converter are configured to be duty-cycled between a sleep state and an active wakeup receive state during the wakeup mode.

    Gated ring oscillator linearization

    公开(公告)号:US11762340B2

    公开(公告)日:2023-09-19

    申请号:US17390291

    申请日:2021-07-30

    CPC classification number: G04F10/005 H03K3/0315

    Abstract: Aspects of the disclosure provide for an apparatus comprising a time-to-digital converter (TDC) and a processor coupled to the TDC. In some examples, the TDC may be configured to receive a signal and generate a measurement result indicating a time between start and stop events of the signal. The processor may be configured to receive the measurement result, compare the measurement result to a target value, and determine a non-linearity model configured to correct a variance of the measurement result from the target value.

    Low-complexity synchronization header detection

    公开(公告)号:US11165555B2

    公开(公告)日:2021-11-02

    申请号:US17028328

    申请日:2020-09-22

    Abstract: A technique of separating a sequence of modulation shift keying (MSK) symbols into a first portion and a second portion and separately comparing the first portion of the sequence of MSK symbols and the second portion of the sequence of MSK symbols against a first portion of a reference sequence of MSK symbols and a second portion of the reference sequence of MSK symbols allows a low complexity detection of a start field delimiter in a wireless communication packet.

    TIME-TO-DIGITAL CONVERTER STOP TIME CONTROL

    公开(公告)号:US20210075427A1

    公开(公告)日:2021-03-11

    申请号:US17087978

    申请日:2020-11-03

    Abstract: In described examples, an electronic circuit for determining a phase difference between a first clock signal and a second clock signal includes a timer circuit, circuitry for generating a selectively delayed transition of the second clock signal, and phase determination circuitry. The timer circuit produces an elapsed time between a transition of the first clock signal and the selectively delayed transition of the second clock signal. The circuitry for generating the selectively delayed transition of the second clock signal generates the selectively delayed transition in response to a random selection of a respective output from a plurality of second clock signal delay stages. The phase determination circuitry provides the phase difference in response to the elapsed time and the random selection of a respective output from a plurality of second clock signal delay stages.

    Time-to-digital converter stop time control

    公开(公告)号:US10862488B2

    公开(公告)日:2020-12-08

    申请号:US16232911

    申请日:2018-12-26

    Abstract: In described examples, an electronic circuit for determining a phase difference between a first clock signal and a second clock signal includes a timer circuit, circuitry for generating a selectively delayed transition of the second clock signal, and phase determination circuitry. The timer circuit produces an elapsed time between a transition of the first clock signal and the selectively delayed transition of the second clock signal. The circuitry for generating the selectively delayed transition of the second clock signal generates the selectively delayed transition in response to a random selection of a respective output from a plurality of second clock signal delay stages. The phase determination circuitry provides the phase difference in response to the elapsed time and the random selection of a respective output from a plurality of second clock signal delay stages.

    ELECTRONIC DEVICE AND METHOD FOR LOW POWER RF RANGING

    公开(公告)号:US20190187262A1

    公开(公告)日:2019-06-20

    申请号:US15845290

    申请日:2017-12-18

    CPC classification number: G01S11/08

    Abstract: Electronic devices and methods to provide wireless ranging are shown. A first electronic device includes a memory containing stored instructions that can perform a method for determining a distance between the first electronic device and a second electronic device. For each frequency in a selected set of frequencies, the method sets the transceiver to the respective frequency, sends a first tone having the frequency and a first phase to the second electronic device and receives a second tone having the first frequency and a second phase. For each selected frequency, the first electronic device determines the phase difference between the second tone and the controllable oscillator, receives a phase difference from the second electronic device, and calculates a phase delay for the frequency. The first electronic device calculates a phase delay difference for pairs of the frequencies; and determines the distance using these phase delay differences.

Patent Agency Ranking