Abstract:
A fault detection circuit includes a short circuit comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes an over-current comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes a voltage divider circuit which has a first terminal connected to first input of the short circuit comparison circuit, a second terminal connected to the first input of the over-current comparison circuit, and a third terminal connected to a ground terminal. The circuit includes a delay circuit which has an input connected to the output of the over-current comparison circuit and has an output.
Abstract:
Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.
Abstract:
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
Abstract:
Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.
Abstract:
A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11_Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12_Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21_Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22_Ctrl). Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner (24) combines output signals of the power amplifiers to produce an output signal (SOUT(t)).
Abstract:
A level shifter includes a signal generator that generates differential signals on a first output and a second output. A first capacitor is coupled between the first output and a first node and a second capacitor is coupled between the second output and a second node. A third capacitor is coupled between the first node and a first voltage potential, wherein the capacitance of the third capacitor is variable. A fourth capacitor is coupled between the second node and the first voltage potential, wherein the capacitance of the fourth capacitor is variable.
Abstract:
A level shifter includes a signal generator that generates differential signals on a first output and a second output. A first capacitor is coupled between the first output and a first node and a second capacitor is coupled between the second output and a second node. A third capacitor is coupled between the first node and a first voltage potential, wherein the capacitance of the third capacitor is variable. A fourth capacitor is coupled between the second node and the first voltage potential, wherein the capacitance of the fourth capacitor is variable.
Abstract:
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
Abstract:
A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11—Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12—Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21—Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22—Ctrl). Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner (24) combines output signals of the power amplifiers to produce an output signal (SOUT(t)).
Abstract:
Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.