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    Linearity Correction in High Voltage Transmit Switches
    11.
    发明公开
    Linearity Correction in High Voltage Transmit Switches 审中-公开

    公开(公告)号：US20240243714A1

    公开(公告)日：2024-07-18

    申请号：US18193243

    申请日：2023-03-30

    Applicant: Texas Instruments Incorporated

    Inventor： Ravikumar Pattipaka ,  Raja Sekhar ,  Sandeep Oswal

    IPC: H03F3/45 ,  H03F1/32 ,  H03G3/30

    CPC classification number: H03F3/45475 ,  H03F1/3211 ,  H03G3/3042

    Abstract: An ultrasonic transmitter including a linear amplifier, an output stage, a switch, and a current compensation circuit. The linear amplifier includes first and second amplifier stages. The output stage has an input coupled to output of the linear amplifier, and presents the transmitter output. The switch is coupled to the output of the linear amplifier. The current compensation circuit has an output coupled at the output of the first amplifier stage. Select circuitry is configured to couple the switch to a bias terminal when the switch is closed, and to couple one or more nodes of the switch to the control terminal of the current compensation circuit when the switch is open. The current compensation circuit generates a compensation current responsive to a sensed non-linear current conducted through the switch when open.

    AC-Coupled Electrocardiogram Signal Acquisition System with Enhanced Common Mode Rejection
    12.
    发明申请
    AC-Coupled Electrocardiogram Signal Acquisition System with Enhanced Common Mode Rejection 有权

    公开(公告)号：US20220416741A1

    公开(公告)日：2022-12-29

    申请号：US17362443

    申请日：2021-06-29

    Applicant: Texas Instruments Incorporated

    Inventor： Sandeep Oswal ,  Raja Reddy Patukuri ,  Aravind Miriyala ,  Anand Hariraj Udupa ,  Hari Babu Tippana ,  Aatish Chandak

    IPC: H03F3/45 ,  A61B5/308

    Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.

    TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER
    13.
    发明申请
    TIME GAIN COMPENSATION CIRCUIT IN AN ULTRASOUND RECEIVER 有权

    公开(公告)号：US20210211102A1

    公开(公告)日：2021-07-08

    申请号：US17210251

    申请日：2021-03-23

    Applicant: Texas Instruments Incorporated

    Inventor： Vajeed Nimran ,  Raja Sekhar ,  Sandeep Oswal ,  Shagun Dusad

    IPC: H03F1/56 ,  H03F3/45

    Abstract: The disclosure provides a time gain compensation (TGC) circuit. The TGC circuit includes an impedance network. A differential amplifier is coupled to the impedance network. The differential amplifier includes a first input port, a second input port, a first output port and a second output port. A first feedback resistor is coupled between the first input port and the first output port. A second feedback resistor is coupled between the second input port and the second output port. The impedance network provides a fixed impedance to the differential amplifier when a gain of the TGC circuit is changed from a maximum value to a minimum value.

    Light radar signal processing apparatus, systems and methods
    16.
    发明授权
    Light radar signal processing apparatus, systems and methods 有权

    公开(公告)号：US09684066B2

    公开(公告)日：2017-06-20

    申请号：US14518800

    申请日：2014-10-20

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Eduardo Bartolome ,  Fernando Alberto Mujica ,  Sandeep Oswal ,  Abhaya Kumar

    IPC: G01C3/08 ,  G01S7/486 ,  G01S17/10

    CPC classification number: G01S7/4861 ,  G01S7/4865 ,  G01S17/10

    Abstract: Samples of a light radar (“LIDAR”) return signal are stored in an analog circular buffer following the transmission of a LIDAR pulse. Sampling continues for a fixed period of time or number of samples during a post-trigger sampling period after the occurrence of a trigger signal from a trigger circuit. The trigger circuit indicates the receipt of a return pulse associated with a target object based upon one or more return signal characteristics. Following the post-trigger sampling period, the stored analog samples are sequentially read out and converted to digital sample values. The digital sample values may be analyzed in a digital processor to further confirm the validity of the returned LIDAR pulse, to determine a time of arrival of the LIDAR pulse, and to calculate a distance to the target object. Some versions include multiple circular buffers and capture clocks, enabling the capture of samples from multiple return pulses.

    LIGHT RADAR SIGNAL PROCESSING APPARATUS, SYSTEMS AND METHODS
    17.
    发明申请
    LIGHT RADAR SIGNAL PROCESSING APPARATUS, SYSTEMS AND METHODS 有权
    光雷达信号处理装置，系统和方法

    公开(公告)号：US20150116695A1

    公开(公告)日：2015-04-30

    申请号：US14518800

    申请日：2014-10-20

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Eduardo Bartolome ,  Fernando Alberto Mujica ,  Sandeep Oswal ,  Abhaya Kumar

    IPC: G01S17/10

    CPC classification number: G01S7/4861 ,  G01S7/4865 ,  G01S17/10

    Abstract: Samples of a light radar (“LIDAR”) return signal are stored in an analog circular buffer following the transmission of a LIDAR pulse. Sampling continues for a fixed period of time or number of samples during a post-trigger sampling period after the occurrence of a trigger signal from a trigger circuit. The trigger circuit indicates the receipt of a return pulse associated with a target object based upon one or more return signal characteristics. Following the post-trigger sampling period, the stored analog samples are sequentially read out and converted to digital sample values. The digital sample values may be analyzed in a digital processor to further confirm the validity of the returned LIDAR pulse, to determine a time of arrival of the LIDAR pulse, and to calculate a distance to the target object. Some versions include multiple circular buffers and capture clocks, enabling the capture of samples from multiple return pulses.

    Abstract translation: 在发送LIDAR脉冲之后，光雷达（“LIDAR”）返回信号的样本被存储在模拟循环缓冲器中。 在从触发电路发生触发信号之后的后触发采样周期中，采样持续一段固定的时间或采样数。 触发电路基于一个或多个返回信号特征指示接收与目标对象相关联的返回脉冲。 在触发后采样周期之后，存储的模拟采样被依次读出并转换为数字采样值。 可以在数字处理器中分析数字样本值，以进一步确认返回的LIDAR脉冲的有效性，以确定LIDAR脉冲的到达时间，并计算到目标对象的距离。 一些版本包括多个循环缓冲器和捕获时钟，可以捕获来自多个返回脉冲的采样。

    Output Stage for High-Voltage Linear Transmitters
    18.
    发明公开
    Output Stage for High-Voltage Linear Transmitters 审中-公开

    公开(公告)号：US20240238841A1

    公开(公告)日：2024-07-18

    申请号：US18192863

    申请日：2023-03-30

    Applicant: Texas Instruments Incorporated

    Inventor： Raja Sekhar ,  Ravikumar Pattipaka ,  Sandeep Oswal

    IPC: B06B1/02 ,  B06B1/06 ,  H03F3/183

    CPC classification number: B06B1/0207 ,  B06B1/06 ,  H03F3/183 ,  A61B8/4488 ,  H03F2200/03

    Abstract: An ultrasonic transceiver system including a transducer, a receiver coupled to the transducer, a transmitter having an output terminal coupled to the transducer, and a transmit/receive switch configured to isolate the receiver from the transmitter during transmission. The transmitter includes an amplifier and an output stage. The output stage includes a source follower transistor having a drain coupled to a supply terminal, a gate coupled to an output of the amplifier, and a source coupled to an output terminal, along with a power stage transistor having a source coupled to the supply terminal, a gate coupled to the drain of the source follower transistor, and a drain coupled to the output terminal. The output stage further includes a parallel source follower transistor having a drain coupled to the supply terminal, a gate coupled to the input terminal, and a source coupled to the output terminal.

    Programmable gain low noise amplifier
    20.
    发明授权
    Programmable gain low noise amplifier 有权

    公开(公告)号：US11936346B2

    公开(公告)日：2024-03-19

    申请号：US17231728

    申请日：2021-04-15

    Applicant: Texas Instruments Incorporated

    Inventor： Rahul Sharma ,  Jagannathan Venkataraman ,  Sandeep Oswal ,  Visvesvaraya Appala Pentakota

    IPC: H03F3/19 ,  H03H11/04 ,  H03M1/12

    CPC classification number: H03F3/19 ,  H03H11/04 ,  H03M1/1245 ,  H03F2200/451

    Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

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