公开(公告)号：US10103171B2

公开(公告)日：2018-10-16

申请号：US15066297

申请日：2016-03-10

Applicant: Texas Instruments Incorporated

Inventor： James Walter Blatchford ,  Scott William Jessen

IPC: H01L23/52 ,  H01L27/118 ,  H01L21/768 ,  H01L27/092 ,  H01L21/28 ,  H01L21/283 ,  H01L23/485 ,  H01L21/8238 ,  H01L21/311

Abstract: An integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, and including elongated contacts which connect to exactly two active areas and/or MOS gates and directly connect to a first level interconnect. A process of forming an integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, using exactly two contact photolithographic exposure operations, and including elongated contacts which connect to exactly two active areas and/or MOS gates and directly connect to a first level interconnect.

公开(公告)号：US11605587B2

公开(公告)日：2023-03-14

申请号：US16383176

申请日：2019-04-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Poornika Fernandes ,  Bhaskar Srinivasan ,  Scott William Jessen ,  Guruvayurappan S. Mathur

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/311

Abstract: In some examples, a method comprises: obtaining a substrate having at a metal interconnect layer deposited over the substrate; forming a first dielectric layer on the metal interconnect layer; forming a second dielectric layer on the first dielectric layer; forming a capacitor metal layer on the second dielectric layer; patterning and etching the capacitor metal layer and the second dielectric layer to the first dielectric layer to leave a portion of the capacitor metal layer and the second dielectric layer on the first dielectric layer; forming an anti-reflective coating to cover the portion of the capacitor metal layer and the second dielectric layer, and to cover the metal interconnect layer; and patterning the metal interconnect layer to form a first metal layer and a second metal layer.

公开(公告)号：US20210134939A1

公开(公告)日：2021-05-06

申请号：US17085116

申请日：2020-10-30

Applicant: Texas Instruments Incorporated

Inventor： Scott William Jessen ,  Tae Seung Kim ,  Steven Lee Prins ,  Can Duan ,  Abbas Ali ,  Erich Wesley Kinder

IPC: H01L49/02 ,  H01L21/8234 ,  H01L27/01 ,  H01L27/12

Abstract: A method of fabricating an integrated circuit (IC) includes forming a dielectric layer on a substrate having a plurality of the IC. A thin-film resistor (TFR) layer is deposited on the dielectric layer, and an underlayer (UL) including carbon is formed on the TFR layer. A hard mask layer including silicon is formed on the UL. Masked etching of the hard mask layer transfers a pattern of a photoresist layer onto the hard mask layer to form a hard mask layer pattern. Masked etching of the UL transfers the hard mask layer pattern onto the UL to form a UL pattern. Masked etching of the TFR layer transfers the UL pattern onto the TFR layer to form a TFR layer pattern including a matched pair of TFRs. The matched pair of TFRs are generally included in circuitry configured together for implementing at least one function.

公开(公告)号：US09343332B2

公开(公告)日：2016-05-17

申请号：US14803538

申请日：2015-07-20

Applicant: Texas Instruments Incorporated

Inventor： Thomas John Aton ,  Steven Lee Prins ,  Scott William Jessen

IPC: H01L21/3213 ,  H01L21/768 ,  H01L21/283 ,  G03F1/42 ,  G03F9/00 ,  H01L21/28 ,  H01L21/311 ,  H01L23/544 ,  H01L29/66

CPC classification number: H01L21/32139 ,  G03F1/00 ,  G03F1/42 ,  G03F9/7084 ,  H01L21/28123 ,  H01L21/283 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/544 ,  H01L29/6659 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of aligning a new pattern to more than one previously defined pattern during the manufacture of an integrated circuit. A method of aligning a photolighography pattern reticle to a first previously defined pattern in a first direction and also aligning the photolithography pattern reticle to a second previously defined pattern in a second direction. A method of aligning a photolighography pattern reticle to two previously defined patterns in the same direction.