公开(公告)号：US20210036127A1

公开(公告)日：2021-02-04

申请号：US16526650

申请日：2019-07-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING , CO., LTD.

Inventor： Cheng-Ming Lin ,  Sai-Hooi Yeong ,  Chi-On Chui ,  Ziwei Fang

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/51

Abstract: A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a semiconductor fin, forming a source/drain structure on the semiconductor fin, forming an interfacial layer on the semiconductor fin, treating the interfacial layer with fluorine, forming a ferroelectric gate dielectric layer on the interfacial layer, treating the ferroelectric gate dielectric layer with fluorine, and forming a gate electrode layer on the ferroelectric gate dielectric layer.

公开(公告)号：US20210028285A1

公开(公告)日：2021-01-28

申请号：US16524137

申请日：2019-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Hao Chang ,  Cheng-Hao Hou ,  Kuei-Lun Lin ,  Kun-Yu Lee ,  Xiong-Fei Yu ,  Chi-On Chui

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/51

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shielding layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.

公开(公告)号：US10658234B2

公开(公告)日：2020-05-19

申请号：US15223902

申请日：2016-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiu Hung ,  Sung-Li Wang ,  Pei-Wen Wu ,  Yida Li ,  Chih-Wei Chang ,  Huang-Yi Huang ,  Cheng-Tung Lin ,  Jyh-Cherng Sheu ,  Yee-Chia Yeo ,  Chi-On Chui

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/522 ,  H01L23/485 ,  H01L21/285 ,  H01L23/532

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dielectric layer over a semiconductor substrate and forming an opening in the dielectric layer to expose a conductive element. The method also includes forming a conductive layer over the conductive element and modifying an upper portion of the conductive layer using a plasma operation to form a modified region. The method further includes forming a conductive plug over the modified region.

公开(公告)号：US12002714B2

公开(公告)日：2024-06-04

申请号：US17884518

申请日：2022-08-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Hsin-Yi Lee ,  Kuan-Yu Wang ,  Cheng-Lung Hung ,  Chi-On Chui

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L21/823437 ,  H01L29/6681 ,  H01L29/785 ,  H01L2029/7858

Abstract: A method of forming a semiconductor device includes forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers over a substrate, the first semiconductor layers and the second semiconductor layers having different compositions, forming a dummy gate structure across the fin structure, forming gate spacers on opposite sidewalls of the dummy gate structure, respectively, removing the dummy gate structure to form a gate trench between the gate spacers, removing portions of the first semiconductor layers in the gate trench, such that the second semiconductor layers are suspended in the gate trench to serve as nanosheets, forming a first titanium nitride layer wrapping around the nanosheets, wherein an atomic ratio of titanium to nitrogen of the first titanium nitride layer is less than 1, and forming a metal fill layer over the first titanium nitride layer.

公开(公告)号：US11489059B2

公开(公告)日：2022-11-01

申请号：US16741767

申请日：2020-01-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Yi Lee ,  Cheng-Lung Hung ,  Weng Chang ,  Chi-On Chui

IPC: H01L29/49 ,  H01L21/28 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/285 ,  H01L29/51

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate strip disposed over the substrate. The gate strip includes a high-k layer disposed over the substrate, an N-type work function metal layer disposed over the high-k layer, and a barrier layer disposed over the N-type work function metal layer. The barrier layer includes at least one first film containing TiAlN, TaAlN or AlN.

公开(公告)号：US11335806B2

公开(公告)日：2022-05-17

申请号：US16990295

申请日：2020-08-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sai-Hooi Yeong ,  Chi-On Chui ,  Chien-Ning Yao

IPC: H01L29/78 ,  H01L21/28 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/417

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a first fin structure over the substrate, and a FeFET device over a first region of the substrate. The FeFET includes a first gate stack across the first fin structure. The semiconductor device structure also includes first gate spacer layers alongside the first gate stack, and a ferroelectric layer over the first gate stack. At least a portion of the ferroelectric layer is located between upper portions of the first gate spacer layers and is adjacent to the first gate stack.

公开(公告)号：US20210226066A1

公开(公告)日：2021-07-22

申请号：US16745340

申请日：2020-01-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Feng Young ,  Sai-Hooi Yeong ,  Chi-On Chui ,  Chien-Ning Yao

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a plurality of semiconductor nanosheets, a source/drain (S/D) region, a gate stack, and a liner layer. The substrate includes at least one fin. The plurality of semiconductor nanosheets are stacked on the at least one fin. The S/D region abuts the plurality of semiconductor nanosheets. The gate stack wraps the plurality of semiconductor nanosheets. The liner layer lines a bottom surface and a sidewall of the S/D region and is sandwiched between the S/D region and the gate stack.

公开(公告)号：US20210126099A1

公开(公告)日：2021-04-29

申请号：US16798440

申请日：2020-02-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Feng Young ,  Sai-Hooi Yeong ,  Chi-On Chui

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a plurality of semiconductor nanosheets, a bottom dielectric layer, and a gate stack. The substrate includes at least one fin. The plurality of semiconductor nanosheets are stacked on the at least one fin. The bottom dielectric layer is disposed between the at least one fin and the plurality of semiconductor nanosheets. The gate stack wraps the plurality of semiconductor nanosheets.

公开(公告)号：US20210091076A1

公开(公告)日：2021-03-25

申请号：US16676443

申请日：2019-11-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsin-Yi Lee ,  Cheng-Lung Hung ,  Weng Chang ,  Chi-On Chui

IPC: H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device including a substrate, a first transistor and a second transistor is provided. The first transistor includes a first gate structure over the first semiconductor fin. The first gate structure includes a first high-k layer and a first work function layer sequentially disposed on the substrate, a material of the first work function layer may include metal carbide and aluminum, and a content of aluminum in the first work function layer is less than 10% atm. The second transistor includes a second gate structure. The second gate structure includes a second high-k layer and a second work function layer sequentially disposed on the substrate. A work function of the first work function layer is greater than a work function of the second work function layer.

公开(公告)号：US20190140082A1

公开(公告)日：2019-05-09

申请号：US15876223

申请日：2018-01-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Yuan Chang ,  Che-Hao Chang ,  Cheng-Hao Hou ,  Kuei-Lun Lin ,  Kun-Yu Lee ,  Xiong-Fei Yu ,  Chi-On Chui

IPC: H01L29/66 ,  H01L29/51 ,  H01L29/78 ,  H01L29/40 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/66795 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/28158 ,  H01L29/408 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shieling layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.