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公开(公告)号:US11670499B2
公开(公告)日:2023-06-06
申请号:US17205847
申请日:2021-03-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Min-Hsiu Hung , Chun-I Tsai , Ken-Yu Chang , Yi-Ying Liu
IPC: H01L21/02 , H01L21/768
CPC classification number: H01L21/02068 , H01L21/76877
Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
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公开(公告)号:US11563083B2
公开(公告)日:2023-01-24
申请号:US17162587
申请日:2021-01-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Shuen-Shin Liang , Sung-Li Wang , Hsu-Kai Chang , Chia-Hung Chu , Chien-Shun Liao , Yi-Ying Liu
IPC: H01L29/06 , H01L29/423 , H01L29/66 , H01L29/417 , H01L29/10
Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and methods of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a nanostructured channel region disposed between the first and second S/D regions, a gate structure surrounding the nanostructured channel region, first and second contact structures disposed on first surfaces of the first and second S/D regions, a third contact structure disposed on a second surface of the first S/D region, and an etch stop layer disposed on a second surface of the second S/D region. The third contact structure includes a metal silicide layer, a silicide nitride layer disposed on the metal silicide layer, and a conductive layer disposed on the silicide nitride layer.
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公开(公告)号:US20230016515A1
公开(公告)日:2023-01-19
申请号:US17875675
申请日:2022-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Chien-Shun Liao , Sung-Li Wang , Shuen-Shin Liang , Shu-Lan Chang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang
IPC: H01L23/532 , H01L23/528 , H01L21/768
Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.
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公开(公告)号:US11257712B2
公开(公告)日:2022-02-22
申请号:US15931111
申请日:2020-05-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Yu-Ming Huang , Ethan Tseng , Ken-Yu Chang , Yi-Ying Liu
IPC: H01L21/768 , H01L29/08 , H01L29/04 , H01L29/161 , H01L29/417 , H01L29/45 , H01L29/66 , H01L21/02 , H01L21/285 , H01L29/78
Abstract: A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C.
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公开(公告)号:US20240379797A1
公开(公告)日:2024-11-14
申请号:US18781353
申请日:2024-07-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Shahaji B. More , Yi-Ying Liu , Shuen-Shin Liang , Sung-Li Wang
IPC: H01L29/423 , H01L21/762 , H01L27/088 , H01L29/06 , H01L29/66 , H01L29/786
Abstract: In an embodiment, a device includes: a first insulating fin; a second insulating fin; a nanostructure between the first insulating fin and the second insulating fin; and a gate structure wrapping around the nanostructure, a top surface of the gate structure disposed above a top surface of the first insulating fin, the top surface of the gate structure disposed below a top surface of the second insulating fin.
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公开(公告)号:US12068252B2
公开(公告)日:2024-08-20
申请号:US17875675
申请日:2022-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Chien-Shun Liao , Sung-Li Wang , Shuen-Shin Liang , Shu-Lan Chang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang
IPC: H01L23/532 , H01L21/768 , H01L23/528
CPC classification number: H01L23/53266 , H01L21/76816 , H01L21/7684 , H01L21/76883 , H01L23/5283 , H01L23/53238
Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.
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公开(公告)号:US20240213016A1
公开(公告)日:2024-06-27
申请号:US18598322
申请日:2024-03-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Min-Hsiu Hung , Chun-I Tsai , Ken-Yu Chang , Yi-Ying Liu
IPC: H01L21/02 , H01L21/768
CPC classification number: H01L21/02068 , H01L21/76871 , H01L21/76877
Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
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公开(公告)号:US20230386913A1
公开(公告)日:2023-11-30
申请号:US18361770
申请日:2023-07-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Yu-Ming Huang , Ethan Tseng , Ken-Yu Chang , Yi-Ying Liu
IPC: H01L21/768 , H01L21/02 , H01L21/285 , H01L29/04 , H01L29/08 , H01L29/161 , H01L29/417 , H01L29/45 , H01L29/66 , H01L29/78
CPC classification number: H01L21/76856 , H01L21/02068 , H01L21/28518 , H01L21/76805 , H01L21/76843 , H01L21/76895 , H01L29/045 , H01L29/0847 , H01L29/161 , H01L29/41791 , H01L29/45 , H01L29/66795 , H01L29/7851
Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.
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公开(公告)号:US20230268173A1
公开(公告)日:2023-08-24
申请号:US18309298
申请日:2023-04-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Min-Hsiu Hung , Chun-I Tsai , Ken-Yu Chang , Yi-Ying Liu
IPC: H01L21/02 , H01L21/768
CPC classification number: H01L21/02068 , H01L21/76877
Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
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公开(公告)号:US20230231025A1
公开(公告)日:2023-07-20
申请号:US17686055
申请日:2022-03-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Wei Chang , Shahaji B. More , Yi-Ying Liu , Shuen-Shin Liang , Sung-Li Wang
IPC: H01L29/423 , H01L29/06 , H01L29/786 , H01L27/088 , H01L29/66 , H01L21/762
CPC classification number: H01L29/42392 , H01L21/762 , H01L27/088 , H01L29/0673 , H01L29/66477 , H01L29/78696
Abstract: In an embodiment, a device includes: a first insulating fin; a second insulating fin; a nanostructure between the first insulating fin and the second insulating fin; and a gate structure wrapping around the nanostructure, a top surface of the gate structure disposed above a top surface of the first insulating fin, the top surface of the gate structure disposed below a top surface of the second insulating fin.
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