公开(公告)号：US20110283054A1

公开(公告)日：2011-11-17

申请号：US13086383

申请日：2011-04-13

申请人： KENJI KOZAKAI ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

发明人： KENJI KOZAKAI ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F11/1068 ,  G06F12/06 ,  G06F2212/1036 ,  G11C16/04 ,  G11C16/10 ,  G11C16/349 ,  G11C29/44 ,  G11C29/76 ,  G11C2029/0409

摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.

摘要翻译： 对于允许电子写入和擦除要存储的信息（例如闪存）的非易失性存储器，系统开发者的负载将被减少，并且即使这样的系统的重要数据也可以避免 由于管理和地址转换信息被破坏，系统无法运行的异常状态。 非易失性存储器设置有替换功能，以替换包括不能正常写入或擦除的缺陷存储器单元的存储器单元组，所述存储器单元不包括不存在缺陷存储器单元的存储单元组，重写次数用于掌握数量 的每个存储器单元组中的数据重写，并且因此执行存储单元组的替换，使得多个存储单元组之间的重写次数可能没有显着差异，以及用于检测和校正任何错误的错误校正功能 存储在存储器阵列中的数据，其中从替换功能导出的第一地址转换信息和从重写平均函数导出的第二地址转换信息被存储在存储器阵列中的分别规定的区域中，并且第一地址转换信息和第二地址 关于相同存储单元组的翻译信息是sto 以时间序列的多个集合中的红色。

公开(公告)号：US20110022913A1

公开(公告)日：2011-01-27

申请号：US12896016

申请日：2010-10-01

申请人： Kenji Kozakai ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

发明人： Kenji Kozakai ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

IPC分类号： G06F1/26 ,  G06F11/07

CPC分类号： G06F12/0246 ,  G06F11/1068 ,  G06F12/06 ,  G06F2212/1036 ,  G11C16/04 ,  G11C16/10 ,  G11C16/349 ,  G11C29/44 ,  G11C29/76 ,  G11C2029/0409

摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.

公开(公告)号：US07694067B2

公开(公告)日：2010-04-06

申请号：US12015050

申请日：2008-01-16

申请人： Nagamasa Mizushima ,  Takashi Tsunehiro ,  Motoyasu Tsunoda ,  Toshio Tanaka ,  Kunihiro Katayama ,  Koichi Kimura ,  Tomihisa Hatano

发明人： Nagamasa Mizushima ,  Takashi Tsunehiro ,  Motoyasu Tsunoda ,  Toshio Tanaka ,  Kunihiro Katayama ,  Koichi Kimura ,  Tomihisa Hatano

IPC分类号： G06F12/00

CPC分类号： G06K7/0021 ,  G06F21/602 ,  G06K7/0047 ,  G06K19/07732

摘要： A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.

摘要翻译： 提供了一种存储装置，其连接用于从主机装置提供的电源和时钟进行操作。 存储器件包括外部端子，存储数据的闪存芯片，处理数据的IC芯片; 以及与外部端子，闪存芯片和IC芯片连接的控制器芯片。 闪存芯片，IC芯片和控制器芯片是分立芯片。 控制器芯片根据主机装置的命令将从主机装置输入的数据写入闪存芯片或IC芯片，并将从闪存芯片或IC芯片读取的数据传送到主机装置。

公开(公告)号：US20090013125A1

公开(公告)日：2009-01-08

申请号：US12015050

申请日：2008-01-16

申请人： Nagamasa MIZUSHIMA ,  Takashi Tsunehiro ,  Motoyasu Tsunoda ,  Toshio Tanaka ,  Kunihiro Katayama ,  Koichi Kimura ,  Tomihisa Hatano

发明人： Nagamasa MIZUSHIMA ,  Takashi Tsunehiro ,  Motoyasu Tsunoda ,  Toshio Tanaka ,  Kunihiro Katayama ,  Koichi Kimura ,  Tomihisa Hatano

IPC分类号： G06F12/02

CPC分类号： G06K7/0021 ,  G06F21/602 ,  G06K7/0047 ,  G06K19/07732

摘要： A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip. The flash memory chip, the IC chip and the controller chip are discrete chips. The controller chip writes data inputted from the host apparatus into the flash memory chip or the IC chip and transfers data read from the flash memory chip or the IC chip to the host apparatus, based upon commands from the host apparatus.

摘要翻译： 提供了一种存储装置，其连接用于从主机装置提供的电源和时钟进行操作。 存储器件包括外部端子，存储数据的闪存芯片，处理数据的IC芯片; 以及与外部端子，闪存芯片和IC芯片连接的控制器芯片。 闪存芯片，IC芯片和控制器芯片是分立芯片。 控制器芯片根据主机装置的命令将从主机装置输入的数据写入闪存芯片或IC芯片，并将从闪存芯片或IC芯片读取的数据传送到主机装置。

公开(公告)号：US07411757B2

公开(公告)日：2008-08-12

申请号：US11460247

申请日：2006-07-27

申请人： Frank R. Chu ,  Richard M. H. New ,  Spencer W. Ng ,  Motoyasu Tsunoda

发明人： Frank R. Chu ,  Richard M. H. New ,  Spencer W. Ng ,  Motoyasu Tsunoda

IPC分类号： G11B15/18

CPC分类号： G06F3/0646 ,  G06F3/0614 ,  G06F3/068 ,  G06F12/0866 ,  G06F2212/217 ,  G11B5/012 ,  G11B5/59694 ,  Y02D10/13

摘要： A hybrid disk drive, i.e., a disk drive with two types of permanent storage media (conventional disk media and nonvolatile memory, such as flash memory), uses its nonvolatile memory in operational modes other than the power-save or “standby” mode wherein the disks are spun down. In a first additional mode, called a “performance” mode, one or more blocks of write data are destaged from volatile memory (the disk drive's write cache) and written to the disk and simultaneously one or more data blocks of write data are destaged from the volatile memory and written to the nonvolatile memory. In a second additional mode, called a “harsh-environment” mode, the disk drive includes one or more environmental sensors, such as temperature and humidity sensors, and the nonvolatile memory temporarily replaces the disks as the permanent storage media. In a third additional mode, called a “write-inhibit” mode, the disk drive includes one or more write-inhibit detectors, such as a shock sensor for detecting disturbances and vibrations to the disk drive. In write-inhibit mode, if the write-inhibit signal is on then the write data is written from the volatile memory to the nonvolatile memory instead of to the disks.

摘要翻译： 混合磁盘驱动器，即具有两种类型的永久存储介质的磁盘驱动器（常规磁盘介质和非易失性存储器，例如闪速存储器），以除了省电模式或“待机”模式之外的操作模式使用其非易失性存储器，其中 磁盘旋转。 在称为“性能”模式的第一附加模式中，一个或多个写入数据块从易失性存储器（磁盘驱动器的写入高速缓存）中迁移并写入到磁盘，同时一个或多个写入数据的数据块从 易失性存储器并写入非易失性存储器。 在称为“恶劣环境”模式的第二附加模式中，磁盘驱动器包括一个或多个环境传感器，例如温度和湿度传感器，并且非易失性存储器暂时将磁盘替换为永久存储介质。 在称为“禁止写入”模式的第三附加模式中，磁盘驱动器包括一个或多个禁止写入检测器，例如用于检测磁盘驱动器的干扰和振动的冲击传感器。 在禁止写入模式下，如果禁止写入信号为ON，则将写入数据从易失性存储器写入非易失性存储器而不是写入磁盘。

公开(公告)号：US07062618B2

公开(公告)日：2006-06-13

申请号：US10172096

申请日：2002-06-13

申请人： Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama ,  Kazuo Nakamura

发明人： Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama ,  Kazuo Nakamura

IPC分类号： G06F12/00

CPC分类号： G06F12/0638 ,  G06F12/08 ,  G06F2212/2022

摘要： A memory apparatus having a volatile memory for storing data from a host, a nonvolatile memory capable of storing the data stored in the volatile memory, and electrically deleting the data, and a control circuit for controlling data transfer between the volatile memory and the nonvolatile memory. A capacity of a data storage area of the volatile memory is larger than that of a data storage area of the nonvolatile memory.

摘要翻译： 一种具有用于存储来自主机的数据的易失性存储器，能够存储存储在易失性存储器中的数据的非易失性存储器以及电气删除数据的存储装置，以及用于控制易失性存储器和非易失性存储器之间的数据传送的控制电路 。 易失性存储器的数据存储区域的容量大于非易失性存储器的数据存储区域的容量。

公开(公告)号：US06563656B2

公开(公告)日：2003-05-13

申请号：US10200509

申请日：2002-07-23

申请人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

发明人： Motoyasu Tsunoda ,  Shoichi Miyazawa ,  Hitoshi Ogawa ,  Ryutaro Horita ,  Takashi Nara ,  Masatoshi Nishina ,  Katsumi Yamamoto

IPC分类号： G11B509

CPC分类号： G11B20/1217 ,  G11B5/59605 ,  G11B20/24 ,  G11B21/106 ,  G11B2020/1287 ,  G11B2020/1298

摘要： A signal processing device for analog-to-digital converting a burst signal has a feature of selecting a data bus to notify a disk control device of a conversion result via an NRZ data bus. The disk control device stores the result of the analog-to-digital conversion of the servo positional signal. The positional signal of a head of the disk device is digitized in a R/W channel. Sampling for digital conversion is performed in only a window which is defined only in the vicinity of peaks of the positional signal. The values of peaks which are obtained by sampling are averaged by an averaging circuit. This enables the influence of noise occurred outside of the window to be eliminated. Although the noise in the window is sampled, its adverse influence is suppressed by the averaging processing.

摘要翻译： 用于模数转换突发信号的信号处理装置具有通过NRZ数据总线选择数据总线以向盘控制装置通知转换结果的特征。 磁盘控制装置存储伺服位置信号的模数转换的结果。 磁盘设备的磁头的位置信号在R / W通道中被数字化。 仅在仅在位置信号的峰值附近定义的窗口中执行用于数字转换的采样。 通过采样获得的峰值由平均电路进行平均。 这使得可以消除在窗外发生的噪声的影响。 虽然窗口中的噪声被采样，但其不利影响被平均处理抑制。

公开(公告)号：US06173342B2

公开(公告)日：2001-01-09

申请号：US09174822

申请日：1998-10-19

申请人： Motoyasu Tsunoda ,  Tatsuo Yamamoto

发明人： Motoyasu Tsunoda ,  Tatsuo Yamamoto

IPC分类号： G06F1300

CPC分类号： G06F3/0601 ,  G06F2003/0692

摘要： A computer is coupled via a bus to a peripheral device. The peripheral device includes an I/O device portion placed on a single microchip coupled to a process device portion. The I/O device portion includes a physical layer in communication with the computer, and a data channel processor in communication with peripheral device. A single oscillator controls the speed of both of these components, and each component includes a dedicated frequency divider. The process device portion may be hardware, software or hardware and software, and may be implemented on a single chip or on multiple chips. To reduce pin count, interface controllers may be used to communicate between the I/O device portion and the process device portion across a single channel.

摘要翻译： 计算机通过总线耦合到外围设备。 外围设备包括放置在耦合到处理设备部分的单个微芯片上的I / O设备部分。 I / O设备部分包括与计算机通信的物理层，以及与外围设备通信的数据通道处理器。 单个振荡器控制这两个组件的速度，每个组件包括专用分频器。 处理设备部分可以是硬件，软件或硬件和软件，并且可以在单个芯片上或在多个芯片上实现。 为了减少引脚数量，可以使用接口控制器来在单个通道上在I / O设备部分和处理设备部分之间进行通信。

公开(公告)号：US08223563B2

公开(公告)日：2012-07-17

申请号：US13086383

申请日：2011-04-13

申请人： Kenji Kozakai ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

发明人： Kenji Kozakai ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

IPC分类号： G11C5/14

CPC分类号： G06F12/0246 ,  G06F11/1068 ,  G06F12/06 ,  G06F2212/1036 ,  G11C16/04 ,  G11C16/10 ,  G11C16/349 ,  G11C29/44 ,  G11C29/76 ,  G11C2029/0409

摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.

摘要翻译： 对于允许电子写入和擦除要存储的信息（例如闪存）的非易失性存储器，系统开发者的负载将被减少，并且即使这样的系统的重要数据也可以避免 由于管理和地址转换信息被破坏，系统无法运行的异常状态。 非易失性存储器设置有替换功能，以替换包括不能正常写入或擦除的缺陷存储器单元的存储器单元组，所述存储器单元不包括不存在缺陷存储器单元的存储单元组，重写次数用于掌握数量 的每个存储器单元组中的数据重写，并且因此执行存储单元组的替换，使得多个存储单元组之间的重写次数可能没有显着差异，以及用于检测和校正任何错误的错误校正功能 存储在存储器阵列中的数据，其中从替换功能导出的第一地址转换信息和从重写平均函数导出的第二地址转换信息被存储在存储器阵列中的分别规定的区域中，并且第一地址转换信息和第二地址 关于相同存储单元组的翻译信息是sto 以时间序列的多个集合中的红色。

公开(公告)号：US20090187702A1

公开(公告)日：2009-07-23

申请号：US12409386

申请日：2009-03-23

申请人： Kenji KOZAKAI ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

发明人： Kenji KOZAKAI ,  Takeshi Nakamura ,  Tatsuya Ishii ,  Motoyasu Tsunoda ,  Shinya Iguchi ,  Junichi Maruyama

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1068 ,  G06F12/06 ,  G06F2212/1036 ,  G11C16/04 ,  G11C16/10 ,  G11C16/349 ,  G11C29/44 ,  G11C29/76 ,  G11C2029/0409

摘要： For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.

摘要翻译： 对于允许电子写入和擦除要存储的信息（例如闪存）的非易失性存储器，系统开发者的负载将被减少，并且即使这样的系统的重要数据也可以避免 由于管理和地址转换信息被破坏，系统无法运行的异常状态。 非易失性存储器设置有替换功能，以替换包括不能正常写入或擦除的缺陷存储器单元的存储器单元组，所述存储器单元不包括不存在缺陷存储器单元的存储单元组，重写次数用于掌握数量 的每个存储器单元组中的数据重写，并且因此执行存储单元组的替换，使得多个存储单元组之间的重写次数可能没有显着差异，以及用于检测和校正任何错误的错误校正功能 存储在存储器阵列中的数据，其中从替换功能导出的第一地址转换信息和从重写平均函数导出的第二地址转换信息被存储在存储器阵列中的分别规定的区域中，并且第一地址转换信息和第二地址 关于相同存储单元组的翻译信息是sto 以时间序列的多个集合中的红色。