公开(公告)号：US20210233903A1

公开(公告)日：2021-07-29

申请号：US17228631

申请日：2021-04-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mona M. Eissa ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Sopa Chevacharoenkul ,  Mark L. Jenson

IPC: H01L27/06 ,  G01R33/04 ,  G01R33/05

Abstract: An integrated circuit has a substrate, a circuit, a core structure, a first encapsulation layer, a second encapsulation layer, and an oxide layer. The circuit includes transistors with active regions developed on the substrate and a metal layer formed above the active regions to provide interconnections for the transistors. The core structure is formed above the metal layer. The first encapsulation layer covers the core structure, and it has a first thermal expansion coefficient. The second encapsulation layer covers the first encapsulation layer over the core structure, and it has a second thermal expansion coefficient that is different from the first thermal expansion coefficient. As a part of the stress relief structure, the oxide layer is formed above the second encapsulation layer. The oxide layer includes an oxide thickness sufficient to mitigate a thermal stress between the first and second encapsulation layers.

公开(公告)号：US10005662B2

公开(公告)日：2018-06-26

申请号：US15680996

申请日：2017-08-18

Applicant: Texas Instruments Incorporated

Inventor： Lee Alan Stringer ,  Mona Eissa ,  Byron J. R. Shulver ,  Sopa Chevacharoenkul ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Mark L. Jenson

IPC: B81C1/00 ,  G01R33/04 ,  G01R33/00

CPC classification number: B81C1/00825 ,  B81C1/00365 ,  B81C2201/0138 ,  B81C2201/014 ,  G01R33/0047 ,  G01R33/0052 ,  G01R33/04

Abstract: A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

公开(公告)号：US20170234942A1

公开(公告)日：2017-08-17

申请号：US15042119

申请日：2016-02-11

Applicant: Texas Instruments Incorporated

Inventor： Sudtida Lavangkul ,  Sopa Chevacharoenkul

IPC: G01R33/04

CPC classification number: G01R33/04

Abstract: An integrated fluxgate device contains a fluxgate magnetometer sensor with a fluxgate core of a thin film magnetic material. Metal windings are disposed above and below the fluxgate core. The fluxgate core has at least one end with a width of at least 5 microns. The fluxgate magnetometer sensor has a crack-resistant structure at the end of the fluxgate core. The crack-resistant structure includes at least one of a laterally rounded contour of the fluxgate core at the end having corner radii of at least 2 microns, a lower metal end structure in the lower dielectric layer extending under the end of the fluxgate core, or an upper metal end structure in the upper dielectric layer extending over the end of the fluxgate core.

公开(公告)号：US20170213956A1

公开(公告)日：2017-07-27

申请号：US15003856

申请日：2016-01-22

Applicant: Texas Instruments Incorporated

Inventor： Mona M. Eissa ,  Mark R. Kimmich ,  Sudtida Lavangkul ,  Sopa Chevacharoenkul ,  Mark L. Jenson

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22

CPC classification number: H01L27/0617 ,  G01R33/04 ,  G01R33/05

Abstract: An integrated circuit has a substrate, a circuit, a core structure, a first encapsulation layer, a second encapsulation layer, and an oxide layer. The circuit includes transistors with active regions developed on the substrate and a metal layer formed above the active regions to provide interconnections for the transistors. The core structure is formed above the metal layer. The first encapsulation layer covers the core structure, and it has a first thermal expansion coefficient. The second encapsulation layer covers the first encapsulation layer over the core structure, and it has a second thermal expansion coefficient that is different from the first thermal expansion coefficient. As a part of the stress relief structure, the oxide layer is formed above the second encapsulation layer. The oxide layer includes an oxide thickness sufficient to mitigate a thermal stress between the first and second encapsulation layers.