公开(公告)号：US09659968B2

公开(公告)日：2017-05-23

申请号：US14244419

申请日：2014-04-03

申请人： Junichi Koezuka ,  Masahiro Katayama ,  Yukinori Shima ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Masahiro Katayama ,  Yukinori Shima ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L27/12 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L27/1225 ,  H01L23/3121 ,  H01L23/564 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： Variation in the electrical characteristics of transistors is minimized and reliability of the transistors is improved. A display device includes a pixel portion 104 and a driver circuit portion 106 outside the pixel portion. The pixel portion includes a pixel transistor, a first insulating layer 122 which covers the pixel transistor and includes an inorganic material, a second insulating layer 124 which is over the first insulating layer and includes an organic material, and a third insulating layer 128 which is over the second insulating layer and includes an inorganic material. The driver circuit portion includes a driving transistor for supplying a signal to the pixel transistor, and the first insulating layer covering the driving transistor. The second insulating layer is not formed in the driver circuit portion.

公开(公告)号：US09196743B2

公开(公告)日：2015-11-24

申请号：US13860855

申请日：2013-04-11

申请人： Masatoshi Yokoyama ,  Tsutomu Murakawa ,  Kenichi Okazaki ,  Masayuki Sakakura ,  Takuya Matsuo ,  Akihiro Oda ,  Shigeyasu Mori ,  Yoshitaka Yamamoto

发明人： Masatoshi Yokoyama ,  Tsutomu Murakawa ,  Kenichi Okazaki ,  Masayuki Sakakura ,  Takuya Matsuo ,  Akihiro Oda ,  Shigeyasu Mori ,  Yoshitaka Yamamoto

IPC分类号： H01L29/10 ,  H01L29/786

CPC分类号： H01L29/7869

摘要： Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.

摘要翻译： 提供了抑制氧化物半导体膜的端部区域中的寄生通道的产生的半导体装置。 半导体器件包括栅电极，氧化物半导体膜，源电极和漏极，以及形成在氧化物半导体膜中的沟道区。 沟道区形成在源电极的第一侧表面和与第一侧表面相对的漏电极的第二侧表面之间。 氧化物半导体膜具有不与栅电极重叠的端部区域。 不与栅电极重叠的端部区域位于最靠近第一侧表面的一端的第一区域和最靠近第二侧表面的一端的第二区域之间。

公开(公告)号：US20130314390A1

公开(公告)日：2013-11-28

申请号：US13983411

申请日：2012-07-25

申请人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Kaoru Yamamoto ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G09G3/36

CPC分类号： G09G3/36 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/0213 ,  G09G2310/0218 ,  G09G2310/0297 ,  G09G2320/0219 ,  G09G2330/023

摘要： There is provided an SSD display device with reduced power consumption.A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film. transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).

摘要翻译： 提供了具有降低的功耗的SSD显示设备。 选择电路（400）由k个选择块（410（1）至410（k））组成。 每个选择块由三个薄膜组成。 晶体管。 三个薄膜晶体管分别具有提供给它们的栅极端子的选择控制信号（CT）的三相。 提供扫描期间（T1），并且后跟空闲期间（T2）。 在空闲时段（T2）中，根据空闲周期频率（fck2）的选择控制信号（CT），使每个选择块中的三个薄膜晶体管成为导通状态。 空闲周期频率（fck2）低于扫描周期频率（fck1）。

公开(公告)号：US4104041A

公开(公告)日：1978-08-01

申请号：US748541

申请日：1976-12-08

申请人： Hidemasa Arita ,  Hitoshi Tomiyama ,  Shigeyasu Mori

发明人： Hidemasa Arita ,  Hitoshi Tomiyama ,  Shigeyasu Mori

IPC分类号： B01D47/06 ,  B01D47/00

CPC分类号： B01D47/06

摘要： This invention relates to a process for treating the waste gas discharged from a urea prilling tower and an apparatus therefor. More particularly, this invention relates to a process for treating the waste gas discharged from a urea prilling tower and an apparatus therefor, characterized by that a continuous liquid or water film flow (hereinafter called merely a liquid film) of a scrubbing solution and/or an absorption liquid (hereinafter called merely a scrubbing solution) is formed so as to traverse across the whole passage of the waste gas within the scrubbing tower, and when the waste gas passes through such a liquid film the fumy minute particles (hereinafter called fumes) of urea, about 1 micron in size, which are contained in said waste gas, are removed by contacting with the scrubbing solution.

摘要翻译： 本发明涉及一种处理从尿素造粒塔排出的废气的方法及其装置。 更具体地说，本发明涉及一种用于处理从尿素造粒塔排出的废气及其装置的方法，其特征在于，连续的液体或水膜流动（以下仅称为液膜）为洗涤液和/或 形成吸收液体（以下简称为洗涤液），以遍及洗涤塔内的废气的整个通道，当废气通过这样的液膜时，蒸馏微粒子（以下称为烟雾） 通过与洗涤溶液接触除去所述废气中所含的大约1微米尺寸的尿素。

公开(公告)号：US09748399B2

公开(公告)日：2017-08-29

申请号：US14246493

申请日：2014-04-07

申请人： Junichi Koezuka ,  Kenichi Okazaki ,  Masahiro Takahashi ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Kenichi Okazaki ,  Masahiro Takahashi ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L29/66 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

摘要： To provide a novel semiconductor device in which a reduction in channel length is controlled. The semiconductor device includes an oxide semiconductor layer having a crystal part, and a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor layer. The oxide semiconductor layer includes a channel formation region and an n-type region in contact with the source electrode layer or the drain electrode layer. The crystal orientation of the crystal part is different between the channel formation region and the n-type region.

公开(公告)号：US09261746B2

公开(公告)日：2016-02-16

申请号：US14234450

申请日：2012-08-03

申请人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

发明人： Seiichi Uchida ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Yutaka Takamaru ,  Shigeyasu Mori

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1333

CPC分类号： G02F1/136213 ,  G02F1/1333 ,  G02F1/136227

摘要： In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.

摘要翻译： 为了抑制像素电极和源极线之间的串扰以减少闪烁，LCD器件包括：栅极线102和栅极线105，其设置为栅格图案; 像素电极111，其以矩阵图案排列，以对应于栅极线和源极线的交点; 透明辅助电容电极109; 以及开关元件121，被配置为根据从栅极线102施加的扫描信号将从源极线105提供的图像信号电压施加到像素电极111.开关元件121通过使用氧化物半导体层104形成，并且 透明辅助电容电极109设置在源极线105和像素电极111之间。

公开(公告)号：US20140145996A1

公开(公告)日：2014-05-29

申请号：US14234950

申请日：2012-07-27

申请人： Yasuhiro Sugita ,  Kazutoshi Kida ,  Shinji Yamagishi ,  Yuhji Yashiro ,  Hiroyuki Ogawa ,  Shigeyasu Mori ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru

发明人： Yasuhiro Sugita ,  Kazutoshi Kida ,  Shinji Yamagishi ,  Yuhji Yashiro ,  Hiroyuki Ogawa ,  Shigeyasu Mori ,  Seiji Kaneko ,  Yasuyuki Ogawa ,  Kaoru Yamamoto ,  Kohhei Tanaka ,  Seiichi Uchida ,  Yutaka Takamaru

IPC分类号： G06F3/041

CPC分类号： G06F3/041 ,  G06F3/0412 ,  G06F3/044 ,  G09G3/3648 ,  G09G2356/00

摘要： A semiconductor layer for an active element included in each of a plurality of pixels in a display section is constituted by an oxide layer containing at least one element selected from the group consisting of In, Ga, and Zn. There is provided, for the display section, a liquid crystal panel's timing controller (13) configured to carry out control so that (i) a length of a first period during which image data is written is not more than twice that of the second period and/or (ii) one (1) frame period is longer than 16.7 msec.

摘要翻译： 包括在显示部分中的多个像素的每一个中的有源元件的半导体层由包含选自由In，Ga和Zn组成的组中的至少一种元素的氧化物层构成。 对于显示部分，提供一种被配置为执行控制的液晶面板的定时控制器（13），使得（i）写入图像数据的第一周期的长度不超过第二周期的两倍 和/或（ii）一（1）个帧周期长于16.7毫秒。