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    Nonvolatile Semiconductor Memory
    12.
    发明申请
    Nonvolatile Semiconductor Memory 有权
    非易失性半导体存储器

    公开(公告)号：US20120075903A1

    公开(公告)日：2012-03-29

    申请号：US13310148

    申请日：2011-12-02

    申请人： Hiroshi Watanabe ,  Hiroshi Nakamura ,  Kazuhiro Shimizu ,  Seiichi Aritome ,  Toshitake Yaegashi ,  Yuji Takeuchi ,  Kenichi Imamiya ,  Ken Takeuchi ,  Hideko Oodaira

    发明人： Hiroshi Watanabe ,  Hiroshi Nakamura ,  Kazuhiro Shimizu ,  Seiichi Aritome ,  Toshitake Yaegashi ,  Yuji Takeuchi ,  Kenichi Imamiya ,  Ken Takeuchi ,  Hideko Oodaira

    IPC分类号： G11C5/06

    CPC分类号： G11C16/0483 ,  G11C16/10

    摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.

    摘要翻译： 选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。 第一级导电层具有接触区域。 第二级导电层的部分被去除，位于接触区域上方。 在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。 一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

    Non-volatile semiconductor memory device and its manufacturing method
    15.
    发明授权
    Non-volatile semiconductor memory device and its manufacturing method 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US06703658B2

    公开(公告)日：2004-03-09

    申请号：US10429460

    申请日：2003-05-05

    申请人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    发明人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    IPC分类号： H01L27108

    CPC分类号： H01L29/788 ,  G11C16/0416 ,  G11C16/0433 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11546 ,  Y10S257/908

    摘要： In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.

    摘要翻译： 在非易失性半导体存储器件及其制造方法中，每个存储单元及其选择Tr具有与Vcc Tr相同的栅极绝缘膜。 此外，Vpp Tr和Vcc Tr的栅极通过使用第一多晶硅层来实现。 可以在第一多晶硅层上提供与第二多晶硅（形成控制栅极层）不同的诸如硅化物或金属的材料。 利用上述特征，可以通过减小的步骤制造非易失性半导体存储器件并以可靠的方式高速运行。

    Non-volatile semiconductor memory device and its manufacturing method
    17.
    发明授权
    Non-volatile semiconductor memory device and its manufacturing method 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US07888728B2

    公开(公告)日：2011-02-15

    申请号：US12140946

    申请日：2008-06-17

    申请人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    发明人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    IPC分类号： H01L29/788

    CPC分类号： H01L29/788 ,  G11C16/0416 ,  G11C16/0433 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11546 ,  Y10S257/908

    摘要： In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.

    摘要翻译： 在非易失性半导体存储器件及其制造方法中，每个存储单元及其选择Tr具有与Vcc Tr相同的栅极绝缘膜。 此外，Vpp Tr和Vcc Tr的栅极通过使用第一多晶硅层来实现。 可以在第一多晶硅层上提供与第二多晶硅（形成控制栅极层）不同的诸如硅化物或金属的材料。 利用上述特征，可以通过减小的步骤制造非易失性半导体存储器件并以可靠的方式高速运行。

    Non-volatile semiconductor memory device and its manufacturing method
    19.
    发明授权
    Non-volatile semiconductor memory device and its manufacturing method 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US06472701B2

    公开(公告)日：2002-10-29

    申请号：US09741261

    申请日：2000-12-19

    申请人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    发明人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    IPC分类号： H01L27108

    CPC分类号： H01L29/788 ,  G11C16/0416 ,  G11C16/0433 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11546 ,  Y10S257/908

    摘要： In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.

    摘要翻译： 在非易失性半导体存储器件及其制造方法中，每个存储单元及其选择Tr具有与Vcc Tr相同的栅极绝缘膜。 此外，Vpp Tr和Vcc Tr的栅极通过使用第一多晶硅层来实现。 可以在第一多晶硅层上提供与第二多晶硅（形成控制栅极层）不同的诸如硅化物或金属的材料。 利用上述特征，可以通过减小的步骤制造非易失性半导体存储器件并以可靠的方式高速运行。

    Non-volatile semiconductor memory device and its manufacturing method
    20.
    发明授权
    Non-volatile semiconductor memory device and its manufacturing method 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08698225B2

    公开(公告)日：2014-04-15

    申请号：US13008735

    申请日：2011-01-18

    申请人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    发明人： Toshitake Yaegashi ,  Kazuhiro Shimizu ,  Seiichi Aritome

    IPC分类号： H01L29/788

    CPC分类号： H01L29/788 ,  G11C16/0416 ,  G11C16/0433 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11546 ,  Y10S257/908

    摘要： In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.

    摘要翻译： 在非易失性半导体存储器件及其制造方法中，每个存储单元及其选择Tr具有与Vcc Tr相同的栅极绝缘膜。 此外，Vpp Tr和Vcc Tr的栅极通过使用第一多晶硅层来实现。 可以在第一多晶硅层上提供与第二多晶硅（形成控制栅极层）不同的诸如硅化物或金属的材料。 利用上述特征，可以通过减小的步骤制造非易失性半导体存储器件并以可靠的方式高速运行。