公开(公告)号：US20150228546A1

公开(公告)日：2015-08-13

申请号：US14177233

申请日：2014-02-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Chun Huang ,  Shin-Chuan Huang ,  Tung-Ming Chen

IPC: H01L21/8238 ,  H01L29/78 ,  H01L21/311 ,  H01L27/092

CPC classification number: H01L21/823864 ,  H01L21/31105 ,  H01L21/31144 ,  H01L21/823807 ,  H01L27/0928 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

Abstract: A manufacturing method for a semiconductor device includes: providing a substrate including a first gate structure disposed thereon, wherein the first gate structure includes a first gate electrode and a first hard mask covers the first gate electrode. A first oxide spacer and a silicon carbon nitride spacer are formed in sequence to surround the first gate electrode. A thermal treatment is performed to form a silicon oxycarbonitride layer between the first oxide spacer and the silicon carbon nitride spacer. Then, a second oxide spacer, a third oxide spacer, and a first silicon nitride spacer are formed on the silicon carbon nitride spacer in sequence. The first hard mask and the first silicon nitride spacer are removed. Finally, the third oxide spacer, the second oxide spacer, and silicon carbon nitride spacer are removed entirely to expose the silicon oxycarbonitride layer.

Abstract translation: 半导体器件的制造方法包括：提供包括设置在其上的第一栅极结构的衬底，其中所述第一栅极结构包括第一栅电极和第一硬掩模覆盖所述第一栅电极。 依次形成第一氧化物间隔物和硅氮化物间隔物以包围第一栅电极。 进行热处理以在第一氧化物间隔物和硅氮化硅间隔物之间​​形成硅碳氮氧化物层。 然后依次在硅氮化物间隔物上形成第二氧化物间隔物，第三氧化物间隔物和第一氮化硅间隔物。 去除第一硬掩模和第一氮化硅间隔物。 最后，完全除去第三氧化物间隔物，第二氧化物间隔物和硅氮化物间隔物以露出硅碳氮氧化物层。

公开(公告)号：US20130292775A1

公开(公告)日：2013-11-07

申请号：US13936214

申请日：2013-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Guang-Yaw Hwang ,  Ling-Chun Chou ,  I-Chang Wang ,  Shin-Chuan Huang ,  Jiunn-Hsiung Liao ,  Shin-Chi Chen ,  Pau-Chung Lin ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chieh-Te Chen

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.

Abstract translation: 应变硅衬底结构包括设置在衬底上的第一晶体管和第二晶体管。 第一晶体管包括第一栅极结构和设置在第一栅极结构的两侧的两个第一源极/漏极区域。 第一源极/漏极到栅极间距在每个第一源极/漏极区域和第一栅极结构之间。 第二晶体管包括第二栅极结构和设置在第二栅极结构的两侧的两个源极/漏极掺杂区域。 第二源极/漏极到栅极间距在每个第二源极/漏极区域和第二栅极结构之间。 第一源极/漏极到栅极距离小于第二源极/漏极到栅极距离。

公开(公告)号：US12125903B2

公开(公告)日：2024-10-22

申请号：US18371440

申请日：2023-09-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/20 ,  H01L29/205 ,  H01L29/207 ,  H01L29/778 ,  H01L21/28 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/7786 ,  H01L21/26546 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66462 ,  H01L21/2654 ,  H01L21/28264 ,  H01L29/41766 ,  H01L29/4236

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

公开(公告)号：US11264492B2

公开(公告)日：2022-03-01

申请号：US16533812

申请日：2019-08-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L21/265

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

公开(公告)号：US20210134978A1

公开(公告)日：2021-05-06

申请号：US16699706

申请日：2019-12-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Tung Yeh ,  Shin-Chuan Huang ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L21/02

Abstract: A high-electron mobility transistor includes a substrate; a buffer layer on the substrate; a AlGaN layer on the buffer layer; a passivation layer on the AlGaN layer; a source region and a drain region on the AlGaN layer; a source layer and a drain layer on the AlGaN layer within the source region and the drain region, respectively; a gate on the AlGaN layer between the source region and a drain region; and a field plate on the gate and the passivation layer. The field plate includes an extension portion that laterally extends to an area between the gate and the drain region. The extension portion has a wave-shaped bottom surface.

公开(公告)号：US20210066484A1

公开(公告)日：2021-03-04

申请号：US16596738

申请日：2019-10-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Shin-Chuan Huang ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/778 ,  H01L29/49 ,  H01L29/20 ,  H01L29/205

Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.

公开(公告)号：US09312258B2

公开(公告)日：2016-04-12

申请号：US13936214

申请日：2013-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Guang-Yaw Hwang ,  Ling-Chun Chou ,  I-Chang Wang ,  Shin-Chuan Huang ,  Jiunn-Hsiung Liao ,  Shin-Chi Chen ,  Pau-Chung Lin ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chieh-Te Chen

IPC: H01L27/088 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.

公开(公告)号：US20250015173A1

公开(公告)日：2025-01-09

申请号：US18888136

申请日：2024-09-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/778 ,  H01L21/265 ,  H01L21/28 ,  H01L29/20 ,  H01L29/205 ,  H01L29/207 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

公开(公告)号：US11502177B2

公开(公告)日：2022-11-15

申请号：US17337437

申请日：2021-06-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/205 ,  H01L29/423

Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.

公开(公告)号：US20220140124A1

公开(公告)日：2022-05-05

申请号：US17575655

申请日：2022-01-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/778 ,  H01L29/66 ,  H01L21/265 ,  H01L29/205 ,  H01L29/20

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.