公开(公告)号：US07149105B2

公开(公告)日：2006-12-12

申请号：US10785913

申请日：2004-02-24

申请人： Stephen L. Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Stephen Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

发明人： Stephen L. Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Stephen Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

IPC分类号： G11C11/00 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L43/08 ,  G11C11/15

摘要： Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy. An amorphous material may be disposed adjacent a bottom surface of a tunnel junction, within a free layer, or both. An MTJ memory cell with improved thermal stability and decreased Neel coupling is achieved.

摘要翻译： 制造MTJ记忆单元的方法及其结构。 在反铁磁层和MTJ存储单元的被钉扎层之间设置扩散阻挡层，以改善MTJ存储单元的热稳定性。 扩散阻挡层可以包括无定形材料或NiFe合金。 无定形材料可以设置在隧道结的底表面附近，在自由层内或两者之间。 实现了具有改进的热稳定性和降低的Neel耦合的MTJ存储单元。

公开(公告)号：US20050185454A1

公开(公告)日：2005-08-25

申请号：US10785913

申请日：2004-02-24

申请人： Stephen Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

发明人： Stephen Brown ,  Arunava Gupta ,  Ulrich Klostermann ,  Stuart Papworth Parkin ,  Wolfgang Raberg ,  Mahesh Samant

IPC分类号： G11C11/00 ,  G11C11/02 ,  G11C11/15 ,  H01L27/22

CPC分类号： H01L43/08 ,  G11C11/15

摘要： Methods of manufacturing MTJ memory cells and structures thereof. A diffusion barrier is disposed between an anti-ferromagnetic layer and a pinned layer of an MTJ memory cell to improve thermal stability of the MTJ memory cell. The diffusion barrier may comprise an amorphous material or a NiFe alloy. An amorphous material may be disposed adjacent a bottom surface of a tunnel junction, within a free layer, or both. An MTJ memory cell with improved thermal stability and decreased Neel coupling is achieved.

摘要翻译： 制造MTJ记忆单元的方法及其结构。 在反铁磁层和MTJ存储单元的被钉扎层之间设置扩散阻挡层，以改善MTJ存储单元的热稳定性。 扩散阻挡层可以包括无定形材料或NiFe合金。 无定形材料可以设置在隧道结的底表面附近，在自由层内或两者之间。 实现了具有改进的热稳定性和降低的Neel耦合的MTJ存储单元。

公开(公告)号：US20050087519A1

公开(公告)日：2005-04-28

申请号：US10690538

申请日：2003-10-23

申请人： Ulrich Klostermann ,  Wolfgang Raberg ,  Philip Trouilloud

发明人： Ulrich Klostermann ,  Wolfgang Raberg ,  Philip Trouilloud

IPC分类号： H01L21/00 ,  B23K26/00

CPC分类号： H01L21/67115 ,  Y10T29/49034 ,  Y10T117/10 ,  Y10T117/1016

摘要： A method (and structure) of thermally treating a magnetic layer of a wafer, includes annealing, for a predetermined short duration, a magnetic layer of a single wafer.

摘要翻译： 热处理晶片的磁性层的方法（和结构）包括在预定的短时间内退火单个晶片的磁性层。

公开(公告)号：US07697322B2

公开(公告)日：2010-04-13

申请号：US11775599

申请日：2007-07-10

申请人： Rainer Leuschner ,  Ulrich Klostermann

发明人： Rainer Leuschner ,  Ulrich Klostermann

IPC分类号： G11C11/00

CPC分类号： G11C11/15 ,  H01L27/222 ,  H01L43/08

摘要： Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.

摘要翻译： 本发明的实施例一般涉及集成电路，集成电路的制造方法，减小磁场影响的方法以及存储器模块。 在本发明的实施例中，提供了具有磁性隧道结的集成电路。 磁性隧道结可以包括具有通过施加通过磁性隧道结的写入电流而选择的磁化取向的自由层，以及在低于保持温度的温度下保持自由层的可选磁化取向的保留层。

公开(公告)号：US20100084741A1

公开(公告)日：2010-04-08

申请号：US12247763

申请日：2008-10-08

申请人： Dieter Andres ,  Rainer Bruchhaus ,  Ulrike Gruening-Von Schwerin ,  Ulrich Klostermann ,  Franz Kreupl ,  Michael Kund ,  Petra Majewski ,  Christian Ruester ,  Bernhard Ruf ,  Ralf Symanczyk ,  Klaus-Dieter Ufert

发明人： Dieter Andres ,  Rainer Bruchhaus ,  Ulrike Gruening-Von Schwerin ,  Ulrich Klostermann ,  Franz Kreupl ,  Michael Kund ,  Petra Majewski ,  Christian Ruester ,  Bernhard Ruf ,  Ralf Symanczyk ,  Klaus-Dieter Ufert

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  G11C13/0004 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2472 ,  H01L29/0673 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/14 ,  H01L45/141 ,  H01L45/144 ,  H01L45/146 ,  H01L45/149 ,  H01L45/1675 ,  H01L45/1683

摘要： According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element.

摘要翻译： 根据实施例，公开了包括多个电阻变化存储单元的集成电路。 每个存储单元包括布置在第一电极和第二电极之间的第一电极，第二电极和电阻变化存储元件。 第一电极的面向电阻变化存储元件的端部的前表面区域小于面向电阻变化存储元件的第二电极的端部的前表面区域。

公开(公告)号：US20090273966A1

公开(公告)日：2009-11-05

申请号：US12114466

申请日：2008-05-02

申请人： Dietmar Gogl ,  Rainer Leuschner ,  Ulrich Klostermann

发明人： Dietmar Gogl ,  Rainer Leuschner ,  Ulrich Klostermann

IPC分类号： G11C11/02

CPC分类号： G11C11/1675 ,  G11C11/1659

摘要： According to one embodiment of the present invention, an integrated circuit includes a plurality of thermal selectable memory cells, each memory cell being connected to a conductive line, the conductive line having a first portion for applying a heating current, and a second portion for applying a programming current. The integrated circuit is configured such that the heating current and the programming current can be routed respectively to the first and the second portion of the conductive line independently from each other.

摘要翻译： 根据本发明的一个实施例，集成电路包括多个热可选择存储单元，每个存储单元连接到导电线，该导线具有用于施加加热电流的第一部分和用于施加加热电流的第二部分 编程电流。 集成电路被配置为使得加热电流和编程电流可以彼此独立地分别路由到导线的第一和第二部分。

公开(公告)号：US20090072217A1

公开(公告)日：2009-03-19

申请号：US11856668

申请日：2007-09-17

申请人： Ulrich Klostermann

发明人： Ulrich Klostermann

IPC分类号： H01L47/00 ,  H01L21/00

CPC分类号： H01L27/2463 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/141 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/1658

摘要： Embodiments of the present invention relate generally to integrated circuits, to methods for manufacturing an integrated circuit and to a memory module. In an embodiment of the invention, an integrated circuit is provided having a programmable arrangement. The programmable arrangement includes a substrate having a main processing surface, at least two first electrodes, wherein each of the two first electrodes has a side surface being arranged at a respective angle with regard to the main processing surface, the side surfaces facing one another. The programmable arrangement may further include at least one second electrode and ion conducting material between each of the at least two first electrodes and the at least one second electrode, wherein the at least one second electrode is arranged partially between the side surfaces of the two first electrodes facing one another.

摘要翻译： 本发明的实施例一般涉及集成电路，制造集成电路和存储器模块的方法。 在本发明的实施例中，提供具有可编程布置的集成电路。 可编程布置包括具有主处理表面的基板，至少两个第一电极，其中两个第一电极中的每一个具有相对于主处理表面相对于主处理表面相对的角度布置的侧表面。 所述可编程布置还可以包括在所述至少两个第一电极和所述至少一个第二电极中的每一个之间的至少一个第二电极和离子传导材料，其中所述至少一个第二电极部分地布置在所述两个第一电极 电极彼此面对。

公开(公告)号：US20090016096A1

公开(公告)日：2009-01-15

申请号：US11775599

申请日：2007-07-10

申请人： Rainer Leuschner ,  Ulrich Klostermann

发明人： Rainer Leuschner ,  Ulrich Klostermann

IPC分类号： G11C11/00 ,  H01L21/00

CPC分类号： G11C11/15 ,  H01L27/222 ,  H01L43/08

摘要： Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.

摘要翻译： 本发明的实施例一般涉及集成电路，集成电路的制造方法，减小磁场影响的方法以及存储器模块。 在本发明的实施例中，提供了具有磁性隧道结的集成电路。 磁性隧道结可以包括具有通过施加通过磁性隧道结的写入电流而选择的磁化取向的自由层，以及在低于保持温度的温度下保持自由层的可选磁化取向的保留层。

公开(公告)号：US07436700B2

公开(公告)日：2008-10-14

申请号：US11769454

申请日：2007-06-27

申请人： Manfred Ruehrig ,  Joachim Wecker ,  Ulrich Klostermann

发明人： Manfred Ruehrig ,  Joachim Wecker ,  Ulrich Klostermann

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： An MRAM memory cell is provided having a layer system made of circular-disk-shaped layers. The memory cell includes first and second magnetic layers separated by a nonmagnetic intermediate layer. The first magnetic layer exhibits hard-magnetic behavior and serves as a reference layer. The second magnetic layer exhibits soft-magnetic behavior and serves as a storage layer. An antiferromagnetic layer may be provided on the storage layer. Information is stored by the magnetization state of the storage layer. The storage layer has a weak intrinsic anisotropy that defines a magnetic preferred direction. The magnetization direction of the reference layer is parallel to the magnetization direction of a remanent magnetization in the interior of the storage layer. The remanent magnetization occurs as a result of applying an external magnetic field with a field component perpendicular to the preferred direction of the intrinsic anisotropy of the storage layer.

摘要翻译： 提供了具有由圆盘形层制成的层系统的MRAM存储单元。 存储单元包括由非磁性中间层隔开的第一和第二磁性层。 第一磁性层表现出硬磁性能并且用作参考层。 第二磁性层表现出软磁性能并用作存储层。 可以在存储层上设置反铁磁层。 通过存储层的磁化状态存储信息。 存储层具有限定磁性优选方向的弱本征各向异性。 参考层的磁化方向平行于存储层内部的剩余磁化的磁化方向。 作为施加具有垂直于存储层的固有各向异性的优选方向的场分量的外部磁场的结果，发生剩余磁化。

公开(公告)号：US20080002462A1

公开(公告)日：2008-01-03

申请号：US11769454

申请日：2007-06-27

申请人： Manfred Ruehrig ,  Joachim Wecker ,  Ulrich Klostermann

发明人： Manfred Ruehrig ,  Joachim Wecker ,  Ulrich Klostermann

IPC分类号： G11C13/06

CPC分类号： G11C11/16

摘要： An MRAM memory cell is provided having a layer system made of circular-disk-shaped layers. The memory cell includes first and second magnetic layers separated by a nonmagnetic intermediate layer. The first magnetic layer exhibits hard-magnetic behavior and serves as a reference layer. The second magnetic layer exhibits soft-magnetic behavior and serves as a storage layer. An antiferromagnetic layer may be provided on the storage layer. Information is stored by the magnetization state of the storage layer. The storage layer has a weak intrinsic anisotropy that defines a magnetic preferred direction. The magnetization direction of the reference layer is parallel to the magnetization direction of a remanent magnetization in the interior of the storage layer. The remanent magnetization occurs as a result of applying an external magnetic field with a field component perpendicular to the preferred direction of the intrinsic anisotropy of the storage layer.

摘要翻译： 提供了具有由圆盘形层制成的层系统的MRAM存储单元。 存储单元包括由非磁性中间层隔开的第一和第二磁性层。 第一磁性层表现出硬磁性能并且用作参考层。 第二磁性层表现出软磁性能并用作存储层。 可以在存储层上设置反铁磁层。 通过存储层的磁化状态存储信息。 存储层具有限定磁性优选方向的弱本征各向异性。 参考层的磁化方向平行于存储层内部的剩余磁化的磁化方向。 作为施加具有垂直于存储层的固有各向异性的优选方向的场分量的外部磁场的结果，发生剩余磁化。