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公开(公告)号:US20240315095A1
公开(公告)日:2024-09-19
申请号:US18135741
申请日:2023-04-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chuan-Lan Lin , Yu-Ping Wang , Chien-Ting Lin , Chu-Fu Lin , Chun-Ting Yeh , Chung-Hsing Kuo , Yi-Feng Hsu
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: A semiconductor device includes a substrate having a bonding area and a pad area, a first inter-metal dielectric (IMD) layer on the substrate, a metal interconnection in the first IMD layer, a first pad on the bonding area and connected to the metal interconnection, and a second pad on the pad area and connected to the metal interconnection. Preferably, the first pad includes a first portion connecting the metal interconnection and a second portion on the first portion, and the second pad includes a third portion connecting the metal interconnection and a fourth portion on the third portion, in which top surfaces of the second portion and the fourth portion are coplanar.
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公开(公告)号:US20240162401A1
公开(公告)日:2024-05-16
申请号:US18078103
申请日:2022-12-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chuan-Lan Lin , Yu-Ping Wang , Chien-Ting Lin , Chun-Ting Yeh
IPC: H01L33/62 , H01L25/075
CPC classification number: H01L33/62 , H01L25/0753 , H01L2933/0066
Abstract: A method for fabricating a micro display device includes the steps of providing a wafer comprising a first area, a second area, and a third area, forming first bonding pads on the first area, forming second bonding pads on the second area, and forming third bonding pads on the third area. Preferably, the first bonding pads and the second bonding pads are made of different materials and the first bonding pads and the third bonding pads are made of different materials.
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公开(公告)号:US11557558B2
公开(公告)日:2023-01-17
申请号:US16984601
申请日:2020-08-04
Applicant: United Microelectronics Corp.
Inventor: Zhirui Sheng , Hui-Ling Chen , Chung-Hsing Kuo , Chun-Ting Yeh , Ming-Tse Lin , Chien En Hsu
IPC: H01L21/66 , H01L23/00 , H01L25/065 , H01L25/00
Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.
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公开(公告)号:US11164822B1
公开(公告)日:2021-11-02
申请号:US17035385
申请日:2020-09-28
Applicant: United Microelectronics Corp.
Inventor: Chung-Hsing Kuo , Chun-Ting Yeh , Ming-Tse Lin , Hui-Ling Chen , Chien-Ming Lai
IPC: H01L23/544 , H01L23/488 , H01L23/00
Abstract: A structure of semiconductor device is provided. The structure includes a first bonding pattern, formed on a first substrate. A first grating pattern is disposed on the first substrate, having a plurality of first bars extending along a first direction. A second bonding pattern is formed on a second substrate. A second grating pattern, disposed on the second substrate, having a plurality of second bars extending along the first direction. The first bonding pattern is bonded to the second bonding pattern. One of the first grating pattern and the second grating pattern is stacked over and overlapping at the first direction with another one of the first grating pattern and the second grating pattern. A first gap between adjacent two of the first bars is different from a second gap between adjacent two of the second bars.
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