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    INTEGRATED CIRCUITS WITH STANDARD CELL
    12.
    发明申请
    INTEGRATED CIRCUITS WITH STANDARD CELL 审中-公开

    公开(公告)号：US20190088638A1

    公开(公告)日：2019-03-21

    申请号：US15785447

    申请日：2017-10-17

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chen-Hsien Hsu ,  Chien-Fu Chen ,  Cheng-Yang Tsai ,  Wei-Jen Wang ,  Chao-Wei Lin ,  Zhi-Hong Huang ,  Cheng-Tsung Ku ,  Chin-Sheng Yang

    IPC: H01L27/02 ,  H03K19/0948 ,  H01L23/528 ,  H01L27/092 ,  H01L23/522

    Abstract: The present invention provides an integrated circuit with a standard cell of an inverter. The integrated circuit includes: a first metal line and a second metal line stretching along a first direction; a first dummy gate and a second dummy gate stretching along a second direction; Plural fin structures stretching along the first direction; A gate structure disposed on the fin structures and stretching along the second direction; Two long contact plugs disposed at one side of the gate structure; two short contact plugs disposed at the other side of the gate structure; a gate contact plug disposed on the gate structure; Plural via plugs disposed on the long contact plugs, the short contact plugs and the gate contact plugs; A metal layer includes the first metal line, the second metal line, a third metal line and a fourth metal line.

    LAYOUT OF INTEGRATED CIRCUIT
    13.
    发明申请
    LAYOUT OF INTEGRATED CIRCUIT 有权

    公开(公告)号：US20230095481A1

    公开(公告)日：2023-03-30

    申请号：US17517642

    申请日：2021-11-02

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ruei-Yau Chen ,  Wei-Jen Wang ,  Kun-Yuan Wu ,  Chien-Fu Chen ,  Chen-Hsien Hsu

    IPC: H01L27/02

    Abstract: An integrated circuit layout includes a first and a second standard cells abutting along a boundary line. The boundary line and a first active region of the first standard cell include a distance D1. A first gate line on the first active region protrudes from the first active region by a length L1. The boundary line and a second active region of the second standard cell include a distance D2. A second gate line on the second active region protrudes from the second active region by a length L2. Two first dummy gate lines and two second dummy gate lines are disposed at two sides of the first active region and the second active region and are away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1≤D1−S, L2≤D2−S, and D1≠D2.

    LAYOUT OF INTEGRATED CIRCUIT
    16.
    发明公开
    LAYOUT OF INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20240290771A1

    公开(公告)日：2024-08-29

    申请号：US18657811

    申请日：2024-05-08

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ruei-Yau Chen ,  Wei-Jen Wang ,  Kun-Yuan Wu ,  Chien-Fu Chen ,  Chen-Hsien Hsu

    IPC: H01L27/02

    CPC classification number: H01L27/0207

    Abstract: An integrated circuit layout includes an upper active region comprising a first edge and a second edge extending along a first direction and respectively adjacent to an upper cell boundary by a distance D3 and a distance D4. A first gate line is disposed on the upper active region, extends along a second direction, and protrudes from the first edge by a length L3. A second gate line is disposed on the upper active region, extends along the second direction, and protrudes from the second edge by a length L4. Two dummy gate lines respectively extend along the second direction and are disposed at two sides of the upper active region and away from the upper cell boundary by a distance S. The first direction and the second direction are perpendicular. The distances D3, D4, S and the lengths L3 and L4 have the relationships: L3≤D3−S, L4≤D4−S, and D3≠D4.

    Layout of integrated circuit
    17.
    发明授权
    Layout of integrated circuit 有权

    公开(公告)号：US11984442B2

    公开(公告)日：2024-05-14

    申请号：US17715974

    申请日：2022-04-08

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ruei-Yau Chen ,  Wei-Jen Wang ,  Kun-Yuan Wu ,  Chien-Fu Chen ,  Chen-Hsien Hsu

    IPC: H01L27/02

    CPC classification number: H01L27/0207

    Abstract: A layout includes a first and a second standard cells abutting along a boundary line. The first cell includes first fins. An edge of the first fins closest to and away from the boundary line by a distance D1. A first gate line over-crossing the first fins protrudes from the edge by a length L1. The second cell includes second fins. An edge of the second fins closest to and away from the boundary line by a distance D2. A second gate line over-crossing the second fins protrudes from the edge by a length L2. Two first dummy gate lines at two sides of the first fins and two second dummy lines at two sides of the second fins are respectively away from the boundary line by a distance S. The lengths L1 and L2, the distances S, D1 and D2 have the relationships: L1≤D1−S, L2≤D2−S, and D1≠D2.

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