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公开(公告)号：US07336092B1
公开(公告)日：2008-02-26
申请号：US11490356
申请日：2006-07-19
IPC分类号： G01R31/02
CPC分类号： H03K3/012 , G01R31/2621 , G05B13/021 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03K3/0315 , Y02D10/126 , Y02D10/172
摘要： Systems and methods for closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the integrated circuit's behavior.
摘要翻译： 集成电路闭环反馈控制系统与方法。 在一个实施例中，调整集成电路的多个可控输入以实现集成电路的动态工作指示器的预定值。 基于集成电路行为的动态操作指示灯，通过闭环反馈来控制集成电路的工作状态。
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公开(公告)号：US09407241B2
公开(公告)日：2016-08-02
申请号：US13587827
申请日：2012-08-16
CPC分类号： H03K3/012 , G01R31/2621 , G05B13/021 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03K3/0315 , Y02D10/126 , Y02D10/172
摘要： Systems and methods for closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the integrated circuit's behavior.
摘要翻译： 集成电路闭环反馈控制系统与方法。 在一个实施例中，调整集成电路的多个可控输入以实现集成电路的动态工作指示器的预定值。 基于集成电路行为的动态操作指示灯，通过闭环反馈来控制集成电路的工作状态。
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公开(公告)号：US09081566B2
公开(公告)日：2015-07-14
申请号：US13037042
申请日：2011-02-28
CPC分类号： G06F1/3203 , G05B13/026 , G06F1/206 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and systems for operating a semiconductor device (e.g., a microprocessor) are described. The microprocessor is initially operated at a voltage and frequency that would be within operating limits at any device temperature. Using models that relate device temperature, operating limits and power consumption with voltage and frequency, the amount of supply voltage and a new operating frequency can be selected. The models are periodically consulted thereafter to continue adjusting the supply voltage and operating frequency, so that the microprocessor is caused to operate at very close to its capacity, in particular in those instances when, for example, processor-intensive instructions are being executed.
摘要翻译： 描述了用于操作半导体器件（例如，微处理器）的方法和系统。 微处理器最初以在任何器件温度下处于操作限度内的电压和频率运行。 使用将设备温度，工作限制和功耗与电压和频率相关联的型号，可以选择电源电压和新的工作频率。 此后，定期咨询这些型号以继续调整电源电压和工作频率，以使微处理器在非常接近其容量的情况下工作，特别是在例如执行处理器密集型指令的情况下。
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公开(公告)号：US20120319721A1
公开(公告)日：2012-12-20
申请号：US13587827
申请日：2012-08-16
IPC分类号： G01R31/26
CPC分类号： H03K3/012 , G01R31/2621 , G05B13/021 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03K3/0315 , Y02D10/126 , Y02D10/172
摘要： Systems and methods for closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the integrated circuit's behavior.
摘要翻译： 集成电路闭环反馈控制系统与方法。 在一个实施例中，调整集成电路的多个可控输入以实现集成电路的动态工作指示器的预定值。 基于集成电路行为的动态操作指示灯，通过闭环反馈来控制集成电路的工作状态。
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公开(公告)号：US20120001651A1
公开(公告)日：2012-01-05
申请号：US13235301
申请日：2011-09-16
IPC分类号： G01R31/02
CPC分类号： H03K3/012 , G01R31/2621 , G05B13/021 , G06F1/3203 , G06F1/324 , G06F1/3296 , H03K3/0315 , Y02D10/126 , Y02D10/172
摘要： Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indicator of the integrated circuit at the desired specific operating frequency. The predetermined value is stored in a data structure within a computer usable media. The data structure comprises a plurality of frequency specific predetermined values for a variety of operating frequencies.An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the measured behavior of the integrated circuit.
摘要翻译： 用于集成电路的频率特定闭环反馈控制的系统和方法。 在一个实施例中，调整集成电路的多个可控制输入以在期望的特定工作频率下实现集成电路的动态工作指示器的频率特定预定值。 预定值被存储在计算机可用媒体内的数据结构中。 数据结构包括用于各种工作频率的多个特定于频率的预定值。 基于集成电路的测量行为的动态操作指示灯，通过闭环反馈控制集成电路的工作状态。
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公开(公告)号：US07917772B1
公开(公告)日：2011-03-29
申请号：US11529865
申请日：2006-09-29
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G05B13/026 , G06F1/206 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and systems for operating a semiconductor device (e.g., a microprocessor) are described. The microprocessor is initially operated at a voltage and frequency that would be within operating limits at any device temperature. Using models that relate device temperature, operating limits and power consumption with voltage and frequency, the amount of supply voltage and a new operating frequency can be selected. The models are periodically consulted thereafter to continue adjusting the supply voltage and operating frequency, so that the microprocessor is caused to operate at very close to its capacity, in particular in those instances when, for example, processor-intensive instructions are being executed.
摘要翻译： 描述了用于操作半导体器件（例如，微处理器）的方法和系统。 微处理器最初以在任何器件温度下处于操作限度内的电压和频率运行。 使用将设备温度，工作限制和功耗与电压和频率相关联的型号，可以选择电源电压和新的工作频率。 此后，定期咨询这些型号以继续调整电源电压和工作频率，以使微处理器在非常接近其容量的情况下工作，特别是在例如执行处理器密集型指令的情况下。
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17.发明授权Systems and methods for integrated circuits comprising multiple body biasing domains 有权包括多个主体偏置域的集成电路的系统和方法公开(公告)号：US07859062B1
公开(公告)日：2010-12-28
申请号：US10956722
申请日：2004-09-30
IPC分类号： H01L29/72
CPC分类号： H03K19/0027 , H03K2217/0018
摘要： Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment of the present invention, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
摘要翻译： 包括多个主体偏置域的集成电路的系统和方法。 根据本发明的第一实施例，半导体结构包括第一类型材料的衬底。 包括第二类型材料的壁的第一封闭结构从衬底的表面延伸到第一深度。 所述第二类型材料的下面并耦合到所述封闭结构的平面深井从所述第一深度延伸到第二深度。 所述第二类型材料的封闭结构和平面深孔形成第一类型材料的电隔离区域。 第二类型半导体器件设置成从第一类型材料的电隔离区域接收第一主体偏置电压。 形成在第一类型材料的电隔离区域内的第二类型材料的阱，并且设置第一类型半导体器件以从第二类型材料的阱接收第二主体偏置电压。
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18.发明授权Systems and methods for integrated circuits comprising multiple body bias domains 有权包括多个体偏置域的集成电路的系统和方法公开(公告)号：US07256639B1
公开(公告)日：2007-08-14
申请号：US10956218
申请日：2004-09-30
IPC分类号： H03K5/12
CPC分类号： H03K19/0027 , G01R31/2621 , H03K2217/0018
摘要： Systems and methods for integrated circuits comprising multiple body bias domains. In accordance with a first embodiment of the present invention, an integrated circuit is constructed comprising active semiconductor devices in first and second body bias domains. A first body biasing voltage is coupled to the first body bias domain, and a second body biasing voltage is coupled to the second body bias domain. The first and the second body biasing voltages are adjusted to achieve a desirable relative performance between the active semiconductor devices in the first and the second body bias domains.
摘要翻译： 包括多个体偏置域的集成电路的系统和方法。 根据本发明的第一实施例，构造了包括在第一和第二体偏置域中的有源半导体器件的集成电路。 第一体偏置电压耦合到第一体偏置域，并且第二体偏置电压耦合到第二体偏置域。 调整第一和第二体偏置电压以在第一和第二体偏置域中的有源半导体器件之间实现期望的相对性能。
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19.发明授权Systems and methods for integrated circuits comprising multiple body biasing domains 有权包括多个主体偏置域的集成电路的系统和方法公开(公告)号：US08697512B2
公开(公告)日：2014-04-15
申请号：US12968032
申请日：2010-12-14
IPC分类号： H01L29/72
CPC分类号： H03K19/0027 , H03K2217/0018
摘要： Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
摘要翻译： 包括多个主体偏置域的集成电路的系统和方法。 根据第一实施例，半导体结构包括第一类型材料的衬底。 包括第二类型材料的壁的第一封闭结构从衬底的表面延伸到第一深度。 所述第二类型材料的下面并耦合到所述封闭结构的平面深井从所述第一深度延伸到第二深度。 所述第二类型材料的封闭结构和平面深孔形成第一类型材料的电隔离区域。 第二类型半导体器件设置成从第一类型材料的电隔离区域接收第一主体偏置电压。 形成在第一类型材料的电隔离区域内的第二类型材料的阱，并且设置第一类型半导体器件以从第二类型材料的阱接收第二主体偏置电压。
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公开(公告)号：US07816742B1
公开(公告)日：2010-10-19
申请号：US11400368
申请日：2006-04-06
IPC分类号： H01L29/72
CPC分类号： H01L21/823892 , H01L21/743 , H01L21/761 , H01L21/823878 , H01L29/78
摘要： Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment of the present invention, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
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