Antenna and fixed base rotary positioning structure
    11.
    发明授权
    Antenna and fixed base rotary positioning structure 失效
    天线和固定基座旋转定位结构

    公开(公告)号:US06989798B2

    公开(公告)日:2006-01-24

    申请号:US10724061

    申请日:2003-12-01

    Applicant: Wen-Ching Wu

    Inventor: Wen-Ching Wu

    CPC classification number: H01Q1/084

    Abstract: The present invention discloses an antenna with a fixed base rotary positioning structure, which can be placed on a table or hung on a wall, comprising: a fixed base; a protrusion disposed on the fixed base and having an open end on one side; a chamber enclosed by the rest of three sides; a pivotal axial hole and an arc groove being correspondingly disposed on both sides of the inner wall of the protrusion, such that the pivotal axial hole and the arc groove precisely and pivotally coupling the pivotal axis and the protruded fixing point to the two corresponding sides at one end of the antenna, and the antenna using such pivotal axis as the rotary axis to adjust the antenna to any angle by the open end of the protrusion.

    Abstract translation: 本发明公开了一种具有固定基座旋转定位结构的天线,其可以放置在桌子上或挂在墙上,包括:固定基座; 突出部,其设置在所述固定基座上并且在一侧具有开口端; 一个由三面其余三边围成的房间; 枢转轴孔和弧槽相应地设置在突起的内壁的两侧,使得枢转轴向孔和弧槽精确地并且枢转地将枢转轴线和突出的固定点联接到两个对应的侧面 天线的一端和使用与旋转轴线相关的枢转轴线的天线,以通过突起的开口端将天线调整到任何角度。

    IC with built-in self-test and design method thereof
    12.
    发明授权
    IC with built-in self-test and design method thereof 有权
    IC内置自检及其设计方法

    公开(公告)号:US06950046B2

    公开(公告)日:2005-09-27

    申请号:US10894054

    申请日:2004-07-20

    CPC classification number: H03M3/378 H03M3/458

    Abstract: IC with built-in self-test and design method thereof. The IC comprises an SD-ADC and a Dft circuit. The Dft circuit uses a digital stimulus signal to solve the deadlock problem of the on-chip analog testing and avoid thermal noise. Moreover, according to the design method of the IC, circuits having different specification can use the Dft circuit without performance degradation for original SD-ADC.

    Abstract translation: IC内置自检及其设计方法。 IC包括SD-ADC和Dft电路。 Dft电路使用数字刺激信号来解决片上模拟测试的死锁问题,并避免热噪声。 此外,根据IC的设计方法,具有不同规格的电路可以使用Dft电路,而不会对原始SD-ADC造成性能下降。

    Device for ENOB estimation for ADC's based on dynamic deviation and method therefor
    13.
    发明授权
    Device for ENOB estimation for ADC's based on dynamic deviation and method therefor 失效
    基于动态偏差的ADC的ENOB估计器件及其方法

    公开(公告)号:US06281819B1

    公开(公告)日:2001-08-28

    申请号:US09541859

    申请日:2000-04-03

    CPC classification number: H03M1/1095 H03M1/12

    Abstract: Disclosed are a device and method therefor for ENOB (effective number of bits) estimation for an ADC (analog-to-digital converter) based on dynamic deviation, wherein the correlation between dynamic deviation and ENOB is analyzed so as to provide a novel device and method therefor to estimate and calculate ENOB for an ADC. Dynamic deviation, provided in the present invention, can serve as a novel parameter for use in evaluation of the performance of an ADC. The present invention further provides a model related to the relation of distribution of dynamic deviation and input frequency, wherein ENOB can be therefore predicted for higher input frequency for an ADC without a high-quality signal generator by measuring dynamic deviation for lower input frequency.

    Abstract translation: 公开了一种用于基于动态偏差的ADC(模拟 - 数字转换器)的ENOB(有效位数)估计的装置和方法,其中分析动态偏差与ENOB之间的相关性,以便提供新颖的装置和 用于估计和计算ADC的ENOB的方法。 在本发明中提供的动态偏差可以用作用于评估ADC性能的新颖参数。 本发明还提供了与动态偏差和输入频率分布的关系相关的模型,其中可以通过测量较低输入频率的动态偏差来为没有高质量信号发生器的ADC预测用于较高输入频率的ENOB。

    Lens assembly for optical scanners
    14.
    发明授权
    Lens assembly for optical scanners 失效
    光学扫描仪镜头组件

    公开(公告)号:US5625498A

    公开(公告)日:1997-04-29

    申请号:US517966

    申请日:1995-08-22

    CPC classification number: G02B7/02

    Abstract: A lens assembly including a printed circuit board having a longitudinal series of light emitting diodes, a casing mounted on the printed circuit board and covered over the light emitting diodes and having a glass cover, and a lens having a bottom side mounted on the glass cover, a plane top surface, and a sand finished, peripheral surface which confines the light of the LEDs to the plane top surface of the lens.

    Abstract translation: 一种透镜组件,包括具有纵向串联的发光二极管的印刷电路板,安装在印刷电路板上并覆盖在发光二极管上并具有玻璃盖的壳体和具有安装在玻璃盖上的底侧的透镜 ,平面顶表面,以及将LED的光限制在透镜的平面上表面的砂表面,外表面。

    Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification
    15.
    发明授权
    Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification 有权
    在具有综合征鉴定的记忆中建立自我诊断和修复的方法和装置

    公开(公告)号:US07644323B2

    公开(公告)日:2010-01-05

    申请号:US11742567

    申请日:2007-04-30

    CPC classification number: G11C29/44 G11C29/4401 G11C29/72

    Abstract: Disclosed is a build-in self-diagnosis and repair method and apparatus in a memory with syndrome identification. It applies a fail-pattern identification and a syndrome-format structure to identify at least one type of faulty syndrome in the memory during a memory testing, then generates and exports fault syndrome information associated with the corresponding faulty syndrome. According to the fault syndrome information, the method applies a redundancy analysis algorithm, allocates spare memory elements and repairs the faulty cells in the memory. The syndrome-format structure respectively applies single-faulty-word-syndrome format, faulty-row-segment-syndrome format, and faulty-column-segment-syndrome format for different faulty syndromes, such as faulty row segments and single faulty words, faulty column segments and single faulty words, all of single faulty words, faulty row segments and faulty column segments, and so on.

    Abstract translation: 公开了一种在具有综合征识别的记忆中的内置自诊断和修复方法和装置。 它在存储器测试期间应用故障模式识别和综合征格式结构来识别存储器中的至少一种类型的故障综合征,然后产生并输出与相应的故障综合征相关的故障综合征信息。 根据故障综合信息,该方法应用冗余分析算法,分配备用存储器元件并修复存储器中的故障单元。 综合征格式结构分别针对不良故障综合征,如有缺陷的行段和单一故障字,分别应用单故障字综合征格式,故障行段综合征格式和故障列段综合征格式, 列段和单个故障单词,所有单个故障字,故障行段和故障列段等。

    Can-filter structure of oxygen concentrator
    16.
    发明申请
    Can-filter structure of oxygen concentrator 失效
    氧浓缩器的过滤器结构

    公开(公告)号:US20080302073A1

    公开(公告)日:2008-12-11

    申请号:US11984774

    申请日:2007-11-21

    CPC classification number: B01D46/0024 B01D46/0013 B01D46/008 B01D46/30

    Abstract: The invention is a can-filter structure of an oxygen concentrator, which includes: a first can-filter having filter material; a second can-filter having filter material; and an outlet cover. The first can-filter includes an air inlet provided at the entrance side of the first can-filter and a first conical joint formed at the exit side of the first can-filter, wherein the first conical joint is hollow and at least one recess is provided on the outer surface thereof. The second can-filter includes a second conical joint formed at the entrance side of the second can-filter, wherein the second conical joint is hollow, and at least one engaging hook corresponding to the recess is provided on the inner surface thereof for coupling to the first conical joint. The outlet cover is provided at the exit side of the second can-filter and is coupled thereto by ultrasonic fusion.

    Abstract translation: 本发明是氧浓缩器的罐式过滤器结构,其包括:具有过滤材料的第一罐式过滤器; 具有过滤材料的第二罐式过滤器; 和出口盖。 第一罐式过滤器包括设置在第一罐式过滤器的入口侧的空气入口和形成在第一罐式过滤器的出口侧的第一锥形接头,其中第一锥形接头是中空的,并且至少一个凹部是 设置在其外表面上。 第二罐式过滤器包括形成在第二罐式过滤器的入口侧的第二锥形接头,其中第二锥形接头是中空的,并且在其内表面上设置与凹部对应的至少一个接合钩,用于联接 第一个圆锥形接头。 出口盖设置在第二罐过滤器的出口侧,并通过超声波熔接与其连接。

    Dual-purpose position structure used as hook and dock
    17.
    发明授权
    Dual-purpose position structure used as hook and dock 有权
    两用位置结构用作挂钩和码头

    公开(公告)号:US07401755B2

    公开(公告)日:2008-07-22

    申请号:US10873121

    申请日:2004-06-23

    Applicant: Wen-Ching Wu

    Inventor: Wen-Ching Wu

    CPC classification number: H05K5/0204

    Abstract: The present invention is to provide a dual-purpose position structure used as a hook and a dock comprising a base and another base, wherein the base is sheathed into the another base along a guiding track and two sides of a sliding trench of the base by using a guiding trench and two sides of a sliding plate of the another base, the another base is adjusted by engaging between a saw-toothed part of an elastic arm and a saw-toothed surface of the guiding track to form a dock with a size-adjustable containing space for setting an electronic apparatus therein or being hanged inversely on an office partition as a hook. At least one buckling device located on the supporting plate of the another base can be assembled with at least another buckling device located on a surface of the electronic apparatus.

    Abstract translation: 本发明提供一种用作钩子和码头的双用位置结构,包括基座和另一底座,其中基座沿着引导轨道和底座的滑动沟槽的两侧被套在另一个基座中 使用引导沟槽和另一基座的滑板的两侧,通过在弹性臂的锯齿部分和导轨的锯齿形表面之间的接合来调节另一基座,以形成尺寸为 - 可调整的容纳空间,用于在其中设置电子设备或者作为挂钩在办公室分区上相反地悬挂。 位于另一基座的支撑板上的至少一个屈曲装置可以与位于电子装置的表面上的至少另一个屈曲装置组装在一起。

    Electronic device with heat-dissipation structure
    18.
    发明授权
    Electronic device with heat-dissipation structure 有权
    具有散热结构的电子设备

    公开(公告)号:US07324345B2

    公开(公告)日:2008-01-29

    申请号:US11287023

    申请日:2005-11-23

    CPC classification number: H05K7/20518

    Abstract: An electronic device with a heat-dissipation structure is disclosed. The electronic device comprises a housing, a printed circuit board assembly, and a heat sink. The printed circuit board assembly is disposed in an interior of the housing, and the printed circuit board assembly forms a high-temperatured heat flow area and a low-temperatured heat flow area in the electronic device. The heat sink is disposed between the printed circuit board assembly and the housing and in the low-temperatured heat flow area for balancing heat flow and homogenizing temperature of the electronic device to enhance heat-dissipation efficiency.

    Abstract translation: 公开了一种具有散热结构的电子设备。 电子设备包括壳体,印刷电路板组件和散热器。 印刷电路板组件设置在壳体的内部,并且印刷电路板组件在电子设备中形成高温热流区域和低温热流区域。 散热器布置在印刷电路板组件和壳体之间以及在低温热流区域中,用于平衡电子设备的热流和均匀化温度,以增强散热效率。

    MULTIPURPOSE INPUT PLUG ASSEMBLY AND POWER ADAPTER HAVING THE SAME
    19.
    发明申请
    MULTIPURPOSE INPUT PLUG ASSEMBLY AND POWER ADAPTER HAVING THE SAME 审中-公开
    多用途输入插头组件和具有相同功能的电源适配器

    公开(公告)号:US20070263366A1

    公开(公告)日:2007-11-15

    申请号:US11615729

    申请日:2006-12-22

    CPC classification number: H01R31/06 H01R13/6675

    Abstract: A power adapter includes a housing, an output socket and a multipurpose input plug assembly. The housing contains a circuit board therein. The output plug has an end electrically connected to the circuit board. The multipurpose input plug assembly includes a first connector, a cable, a second connector, a first input plug and a second input plug. An end of the first connector is electrically connected to the circuit board. The cable is interconnected between the first connector and the second connector. The second connector is selectively coupled to the first input plug or the second input plug. When the first input plug is coupled with the second connector, a first input voltage is received by the first input plug. When the second input plug is coupled with the second connector, a second input voltage is received by the second input plug.

    Abstract translation: 电源适配器包括壳体,输出插座和多功能输入插头组件。 壳体中包含一个电路板。 输出插头具有电连接到电路板的端部。 多用途输入插头组件包括第一连接器,电缆,第二连接器,第一输入插头和第二输入插头。 第一连接器的端部电连接到电路板。 电缆在第一连接器和第二连接器之间互连。 第二连接器选择性地联接到第一输入插头或第二输入插头。 当第一输入插头与第二连接器耦合时,第一输入插头接收第一输入电压。 当第二输入插头与第二连接器耦合时,第二输入插头接收第二输入电压。

    Wrapper testing circuits and method thereof for system-on-a-chip
    20.
    发明申请
    Wrapper testing circuits and method thereof for system-on-a-chip 有权
    包装机测试电路及其在片上系统的方法

    公开(公告)号:US20070255986A1

    公开(公告)日:2007-11-01

    申请号:US11819464

    申请日:2007-06-27

    CPC classification number: G01R31/318555

    Abstract: A wrapper testing circuit of system-on-a-chip for electrical tests of at least a core circuit of an integrated circuit and a wrapper testing method thereof are provided. A controller outputs control signals and test signals and receives result signals executed by the core circuit. The wrapper testing circuit comprises a decoding logic and a plurality of wrapper boundary registers. The decoding logic has a signal decoding table which receives and decodes the control signals and then issues decoded signals according to the signal decoding table. The WBR shifts, updates and captures the test signals for the core circuit to execute and output the result signals according to the decoded signals. In comparison with prior art, the testing time is reduced.

    Abstract translation: 提供了一种用于至少集成电路的核心电路的电测试的片上系统的封装测试电路及其包装测试方法。 控制器输出控制信号和测试信号并接收由核心电路执行的结果信号。 包装测试电路包括解码逻辑和多个封装边界寄存器。 解码逻辑具有信号解码表,其接收并解码控制信号,然后根据信号解码表发出解码信号。 WBR移位,更新和捕获核心电路的测试信号,以根据解码的信号执行和输出结果信号。 与现有技术相比,测试时间缩短。

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