公开(公告)号：US06281819B1

公开(公告)日：2001-08-28

申请号：US09541859

申请日：2000-04-03

Applicant: Wen-Ching Wu ,  Hui-Min Wang

Inventor： Wen-Ching Wu ,  Hui-Min Wang

IPC: H03M110

CPC classification number: H03M1/1095 ,  H03M1/12

Abstract: Disclosed are a device and method therefor for ENOB (effective number of bits) estimation for an ADC (analog-to-digital converter) based on dynamic deviation, wherein the correlation between dynamic deviation and ENOB is analyzed so as to provide a novel device and method therefor to estimate and calculate ENOB for an ADC. Dynamic deviation, provided in the present invention, can serve as a novel parameter for use in evaluation of the performance of an ADC. The present invention further provides a model related to the relation of distribution of dynamic deviation and input frequency, wherein ENOB can be therefore predicted for higher input frequency for an ADC without a high-quality signal generator by measuring dynamic deviation for lower input frequency.

Abstract translation: 公开了一种用于基于动态偏差的ADC（模拟 - 数字转换器）的ENOB（有效位数）估计的装置和方法，其中分析动态偏差与ENOB之间的相关性，以便提供新颖的装置和 用于估计和计算ADC的ENOB的方法。 在本发明中提供的动态偏差可以用作用于评估ADC性能的新颖参数。 本发明还提供了与动态偏差和输入频率分布的关系相关的模型，其中可以通过测量较低输入频率的动态偏差来为没有高质量信号发生器的ADC预测用于较高输入频率的ENOB。

公开(公告)号：US08184078B2

公开(公告)日：2012-05-22

申请号：US12327376

申请日：2008-12-03

Applicant: Lin-Kai Bu ,  Hui-Min Wang

Inventor： Lin-Kai Bu ,  Hui-Min Wang

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3696 ,  G09G2320/0276

Abstract: A source driving circuit includes a gamma voltage generator, a common voltage generator and a driver. The gamma voltage generator receives gamma data from a timing controller through reduced swing differential signaling (RSDS) transmission interface to generate corresponding gamma voltages. The common voltage generator receives common voltage data from the timing controller to generate a corresponding common voltage. The driver receives image data from the timing controller through the RSDS transmission interface, the gamma voltages from the gamma voltage generator and the common voltage from the common voltage generator for modifying the image data using the gamma voltages and the common voltage and transmitting the modified image data to a panel of the liquid crystal display.

Abstract translation: 源极驱动电路包括伽马电压发生器，公共电压发生器和驱动器。 伽马电压发生器通过减小的摆幅差分信号（RSDS）传输接口从定时控制器接收伽马数据，以产生相应的伽马电压。 公共电压发生器从定时控制器接收公共电压数据以产生相应的公共电压。 驱动器通过RSDS传输接口从定时控制器接收图像数据，伽马电压发生器的伽马电压和来自公共电压发生器的公共电压，以使用伽马电压和公共电压修改图像数据，并发送修改的图像 数据到液晶显示器的面板。

公开(公告)号：US07991097B2

公开(公告)日：2011-08-02

申请号：US11905797

申请日：2007-10-04

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H04L7/00

CPC classification number: H04L7/0331 ,  H03L7/0814 ,  H04L7/0008 ,  H04L7/0041

Abstract: A method for adjusting a serial data signal having multiple sets of bits includes the following steps. First, one set of bits in the serial data signal is over-sampled to generate a first set of over-sampled bits. Next, every adjacent two bits of the first set of over-sampled bits are compared to generate one set of edge bits. Then, a delay operation is determined according to the set of edge bits. Afterwards, a displacement operation is executed on next sets of bits in the serial data signal according to the delay operation.

Abstract translation: 一种用于调整具有多组位数的串行数据信号的方法包括以下步骤。 首先，串行数据信号中的一组位被过采样以产生第一组过采样位。 接下来，比较第一组过采样比特的每个相邻的两比特以产生一组边缘比特。 然后，根据边缘位的集合来确定延迟操作。 然后，根据延迟动作对串行数据信号中的下一组位执行位移动作。

公开(公告)号：US20090087895A1

公开(公告)日：2009-04-02

申请号：US11862900

申请日：2007-09-27

Applicant: Po-Huang Liang ,  Hui-Min Wang ,  Yan-Ping Shih

Inventor： Po-Huang Liang ,  Hui-Min Wang ,  Yan-Ping Shih

IPC: C12N9/50

CPC classification number: C12N15/62 ,  C07K2319/20 ,  C07K2319/21 ,  C07K2319/23 ,  C12N15/70 ,  C12N15/81

Abstract: This invention features a kit containing multiple expression vectors for producing tag-cleavable fusion proteins in various expression systems, or for producing fusion proteins in E. coli inclusion bodies.

Abstract translation: 本发明的特征在于包含多种表达载体的试剂盒，用于在各种表达系统中产生标签可切割的融合蛋白，或用于在大肠杆菌包涵体中产生融合蛋白。

公开(公告)号：US20130123544A1

公开(公告)日：2013-05-16

申请号：US13445451

申请日：2012-04-12

Applicant: Hui-Min Wang ,  Chung-Yi Chen ,  Chien-Chih Chiu ,  Yi-Ting Chou

Inventor： Hui-Min Wang ,  Chung-Yi Chen ,  Chien-Chih Chiu ,  Yi-Ting Chou

IPC: C07C49/255

CPC classification number: A61K8/35 ,  A61K8/97 ,  A61Q19/08

Abstract: A composition for promoting proliferation and/or migration of skin cells includes a compound of formula (I): or a pharmaceutically acceptable salt or ester thereof.

Abstract translation: 用于促进皮肤细胞增殖和/或迁移的组合物包括式（I）化合物或其药学上可接受的盐或酯。

公开(公告)号：US08441575B2

公开(公告)日：2013-05-14

申请号：US11965261

申请日：2007-12-27

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H04N7/04 ,  H04N5/04 ,  H03B21/00 ,  H03B19/00 ,  H03L7/00 ,  H03M3/00

CPC classification number: H04N5/775 ,  G09G2370/04 ,  G09G2370/12 ,  H04N5/7755 ,  H04N21/242 ,  H04N21/4302

Abstract: It is difficult to implement a conventional phase lock loop circuit in a sink device within an HDMI system because the low frequency input causes the conventional phase lock loop circuit to absorb unnecessary noise during a long waiting period. Therefore, the present invention provides a low jitter clock regenerator comprises: an input clock; a divider to divide said input clock into a slower clock; a phase lock loop circuit to regenerate said slower clock to a reference clock; and a parameter transformer to tune said divider and said phase lock loop circuit to increase the adjustment speed of said phase lock loop circuit. The present invention also provides a method to reorganize parameters in order to create new parameters which are better suitable for a clock recovery circuit in a sink device within an HDMI system.

公开(公告)号：US20120232040A1

公开(公告)日：2012-09-13

申请号：US13042065

申请日：2011-03-07

Applicant: Yen-Hsu CHEN ,  Hui-Min Wang ,  Chung-Yi Chen ,  Hsi-An Chen ,  Wei-Ru Lin

Inventor： Yen-Hsu CHEN ,  Hui-Min Wang ,  Chung-Yi Chen ,  Hsi-An Chen ,  Wei-Ru Lin

IPC: A61K31/65 ,  A61P31/04

CPC classification number: A61K31/12 ,  A61K31/65 ,  A61K2300/00

Abstract: A medication for Acinetobacter baumannii infection comprises tetracycline; and a ginger compound, selecting from a group of [6]-dehydrogingerdione, [10]-gingerol, [6]-shogaol and [6]-gingerol. Also, a method for improving tetracycline-resistance of A. baumannii, by providing the ginger compound described above combined with tetracycline to against A. baumannii infection.

Abstract translation: 鲍曼不动杆菌感染的药物包括四环素; 和一种姜化合物，选自[6] - 脱水二酮，[10] - 庚烯酚，[6] - 羟基和[6] - 庚烯醇的一组。 此外，通过提供上述姜化合物与四环素组合以抵抗鲍曼不动杆菌感染，提高鲍曼不动杆菌四环素抗性的方法。

公开(公告)号：US07885362B2

公开(公告)日：2011-02-08

申请号：US11907859

申请日：2007-10-18

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H04L27/00

CPC classification number: G09G3/20 ,  G09G2310/0275 ,  G09G2370/08

Abstract: A data transmission system includes a transmitter and a receiver. The transmitter mixes an original clock signal and an original data signal to generate and output a hybrid differential signal, the hybrid differential signal having multiple clock pulses and multiple data pulses. At lease one data pulse occurs between two clock pulses, and the period between two clock pulses corresponds to the frequency of the original clock signal. The clock pulses and the data pulses have different differential swings. The receiver receives the hybrid differential signal via a bus and generates a recovered clock signal and a recovered data signal based on the hybrid differential signal. The hybrid differential signal, the original clock signal and the original data signal are reduced swing differential signals.

Abstract translation: 数据传输系统包括发射机和接收机。 发射机混合原始时钟信号和原始数据信号，以产生和输出混合差分信号，混合差分信号具有多个时钟脉冲和多个数据脉冲。 在两个时钟脉冲之间至少发生一个数据脉冲，两个时钟脉冲之间的周期对应于原始时钟信号的频率。 时钟脉冲和数据脉冲具有不同的差分摆幅。 接收机通过总线接收混合差分信号，并根据混合差分信号产生恢复的时钟信号和恢复的数据信号。 混合差分信号，原始时钟信号和原始数据信号是摆幅差分信号。

公开(公告)号：US20090103674A1

公开(公告)日：2009-04-23

申请号：US11907859

申请日：2007-10-18

Applicant: Hui-Min Wang

Inventor： Hui-Min Wang

IPC: H03D3/24 ,  G09G3/36 ,  H04L7/00

CPC classification number: G09G3/20 ,  G09G2310/0275 ,  G09G2370/08

Abstract: A data transmission system includes a transmitter and a receiver. The transmitter mixes an original clock signal and an original data signal to generate and output a hybrid differential signal, the hybrid differential signal having multiple clock pulses and multiple data pulses. At lease one data pulse occurs between two clock pulses, and the period between two clock pulses corresponds to the frequency of the original clock signal. The clock pulses and the data pulses have different differential swings. The receiver receives the hybrid differential signal via a bus and generates a recovered clock signal and a recovered data signal based on the hybrid differential signal. The hybrid differential signal, the original clock signal and the original data signal are reduced swing differential signals.

Abstract translation: 数据传输系统包括发射机和接收机。 发射机混合原始时钟信号和原始数据信号以产生和输出混合差分信号，混合差分信号具有多个时钟脉冲和多个数据脉冲。 在两个时钟脉冲之间至少发生一个数据脉冲，两个时钟脉冲之间的周期对应于原始时钟信号的频率。 时钟脉冲和数据脉冲具有不同的差分摆幅。 接收机通过总线接收混合差分信号，并根据混合差分信号产生恢复的时钟信号和恢复的数据信号。 混合差分信号，原始时钟信号和原始数据信号是摆幅差分信号。

公开(公告)号：US07450675B2

公开(公告)日：2008-11-11

申请号：US11160526

申请日：2005-06-28

Applicant: Hui-Min Wang ,  Chung-Ming Huang ,  Lin-Kai Bu

Inventor： Hui-Min Wang ,  Chung-Ming Huang ,  Lin-Kai Bu

IPC: H04L7/00

CPC classification number: H04L5/023 ,  H04L7/0008 ,  H04L7/033

Abstract: A multi-channel receiver, digital edge tuning circuit and a method for operating the same is disclosed. The digital edge tuning circuit for tuning phases of an input signal and a clock signal, comprises a delay-tuning circuit for receiving the input signal and delaying the input signal to generate a fine-tuned signal; a delay set comprising a plurality of delays connected serially one by one, the input of the delay set coupled to the fine-tune circuit, for receiving the fine-tuned signal; a plurality of sample/hold circuits, each of the sample/hold circuits coupled to a corresponding output of one of the delays and the fine-tune circuit, for sampling and holding the corresponding output; and a dynamic edge tuning circuit, coupled to the sample/hold circuits, for controlling a common delay time delayed by the delay-tuning circuit according to which one of the sample/hold circuits samples a data edge of the input signal.

Abstract translation: 公开了一种多通道接收机，数字边缘调谐电路及其操作方法。 用于调谐输入信号和时钟信号的相位的数字边沿调谐电路包括延迟调谐电路，用于接收输入信号并延迟输入信号以产生微调信号; 延迟集合，包括串联地逐个连接的多个延迟，耦合到微调电路的延迟集合的输入，用于接收微调信号; 多个采样/保持电路，每个采样/保持电路耦合到延迟中的一个的对应输出和微调电路，用于采样和保持相应的输出; 以及耦合到采样/保持电路的动态边沿调谐电路，用于根据哪个采样/保持电路对输入信号的数据沿进行采样来控制由延迟调谐电路延迟的公共延迟时间。