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公开(公告)号：US08604469B2
公开(公告)日：2013-12-10
申请号：US12464920
申请日：2009-05-13
申请人： Woo-Geun Lee , Jae-Hyoung Youn , Ki-Won Kim , Young-Wook Lee , Jong-In Kim
发明人： Woo-Geun Lee , Jae-Hyoung Youn , Ki-Won Kim , Young-Wook Lee , Jong-In Kim
IPC分类号： H01L29/10
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78696
摘要： A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.
摘要翻译： 薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，包括栅极电极，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上并包括薄膜晶体管的沟道的半导体 ，形成在半导体上的数据线，包括相对于薄膜晶体管的沟道形成在半导体上并与源电极相对的源电极和漏电极，其中薄膜晶体管的沟道覆盖两个侧表面 的栅电极。
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公开(公告)号：US08389998B2
公开(公告)日：2013-03-05
申请号：US13444768
申请日：2012-04-11
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
IPC分类号： H01L27/14
CPC分类号： H01L29/66742 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。
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公开(公告)号：US20120193634A1
公开(公告)日：2012-08-02
申请号：US13444768
申请日：2012-04-11
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/66742 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。
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公开(公告)号：US20100140610A1
公开(公告)日：2010-06-10
申请号：US12556277
申请日：2009-09-09
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jang-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jang-In Kim
IPC分类号： H01L29/786 , H01L29/12 , H01L21/336
CPC分类号： H01L29/66742 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。
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公开(公告)号：US20080237037A1
公开(公告)日：2008-10-02
申请号：US12035086
申请日：2008-02-21
申请人： Chong-Chul CHAI , Mee-Hye Jung , Woo-Geun Lee , Woo-Seok Jeon , Young-Wook Lee , Jung-In Park , Jun-Hyung Souk , Won-Kie Chang , Shi-Yul Kim
发明人： Chong-Chul CHAI , Mee-Hye Jung , Woo-Geun Lee , Woo-Seok Jeon , Young-Wook Lee , Jung-In Park , Jun-Hyung Souk , Won-Kie Chang , Shi-Yul Kim
IPC分类号： G03F9/00
摘要： A mask includes a transparent substrate, a light-blocking layer and a halftone layer. The light-blocking layer includes a source electrode pattern portion including a first electrode portion, a second electrode portion and a third electrode portion, and a drain electrode pattern portion disposed between the second electrode portion and the third electrode portion. The halftone layer includes a halftone portion corresponding to a spaced-apart portion between the source electrode pattern portion and the drain electrode pattern portion, and a dummy halftone portion more protrusive than ends of the second electrode portion and the third electrode portion. Thus, a photoresist pattern corresponding to a channel portion of a thin film transistor (TFT) may be formed with a uniform thickness, to thereby prevent an excessive etching of the channel portion.
摘要翻译： 掩模包括透明基板，遮光层和半色调层。 遮光层包括包括第一电极部分，第二电极部分和第三电极部分的源电极图案部分和设置在第二电极部分和第三电极部分之间的漏电极图案部分。 半色调层包括对应于源电极图案部分和漏电极图案部分之间的间隔部分的半色调部分和比第二电极部分和第三电极部分的端部更突出的虚拟半色调部分。 因此，可以形成对应于薄膜晶体管（TFT）的沟道部分的光致抗蚀剂图案，其厚度均匀，从而防止通道部分的过度蚀刻。
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公开(公告)号：US07923176B2
公开(公告)日：2011-04-12
申请号：US12035086
申请日：2008-02-21
申请人： Chong-Chul Chai , Mee-Hye Jung , Woo-Geun Lee , Woo-Seok Jeon , Young-Wook Lee , Jung-In Park , Jun-Hyung Souk , Won-Kie Chang , Shi-Yul Kim
发明人： Chong-Chul Chai , Mee-Hye Jung , Woo-Geun Lee , Woo-Seok Jeon , Young-Wook Lee , Jung-In Park , Jun-Hyung Souk , Won-Kie Chang , Shi-Yul Kim
摘要： A mask includes a transparent substrate, a light-blocking layer and a halftone layer. The light-blocking layer includes a source electrode pattern portion including a first electrode portion, a second electrode portion and a third electrode portion, and a drain electrode pattern portion disposed between the second electrode portion and the third electrode portion. The halftone layer includes a halftone portion corresponding to a spaced-apart portion between the source electrode pattern portion and the drain electrode pattern portion, and a dummy halftone portion more protrusive than ends of the second electrode portion and the third electrode portion. Thus, a photoresist pattern corresponding to a channel portion of a thin film transistor (TFT) may be formed with a uniform thickness, to thereby prevent an excessive etching of the channel portion.
摘要翻译： 掩模包括透明基板，遮光层和半色调层。 遮光层包括包括第一电极部分，第二电极部分和第三电极部分的源电极图案部分和设置在第二电极部分和第三电极部分之间的漏电极图案部分。 半色调层包括对应于源电极图案部分和漏电极图案部分之间的间隔部分的半色调部分和比第二电极部分和第三电极部分的端部更突出的虚拟半色调部分。 因此，可以形成对应于薄膜晶体管（TFT）的沟道部分的光致抗蚀剂图案，其厚度均匀，从而防止通道部分的过度蚀刻。
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17.发明授权公开(公告)号：US08111343B2
公开(公告)日：2012-02-07
申请号：US12361511
申请日：2009-01-28
申请人： Young-Wook Lee , Gug-Rae Jo , Jang-Soo Kim , Jae-Hyoung Youn , Byoung-Joo Kim , Min-Uk Kim , Kyoung-Keun Son
发明人： Young-Wook Lee , Gug-Rae Jo , Jang-Soo Kim , Jae-Hyoung Youn , Byoung-Joo Kim , Min-Uk Kim , Kyoung-Keun Son
IPC分类号： G02F1/136 , G02F1/1335 , G02F1/1343
CPC分类号： G02F1/136286 , G02F1/133514 , G02F2001/136222 , G02F2201/40
摘要： A display substrate includes a plurality of color filters formed on a base substrate, a gate line formed in a trench defined by at least one of the color filters and extended along a first direction, an insulation layer formed on the color filters and the gate line, a data line formed on the insulation layer to be extended along a second direction crossing the first direction, and pixel electrodes formed on the base substrate having the data line formed thereon.
摘要翻译： 显示基板包括形成在基底基板上的多个滤色器，形成在由至少一个滤色器限定的沟槽中并沿着第一方向延伸的沟槽的栅极线，形成在滤色器上的绝缘层和栅极线 形成在沿着与第一方向交叉的第二方向延伸的绝缘层上的数据线以及形成在其上形成有数据线的基底基板上的像素电极。
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公开(公告)号：US20080252828A1
公开(公告)日：2008-10-16
申请号：US11930653
申请日：2007-10-31
申请人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
发明人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
IPC分类号： G02F1/1335 , G02F1/1343
CPC分类号： G02F1/133514 , G02F1/134309 , G02F2001/134345 , G02F2001/136222
摘要： A thin film transistor array panel includes a substrate, a first gate line and a second gate line formed on the substrate, a storage electrode line between the first gate line and the second gate line, a data line intersecting the first gate line and the second gate line, a first thin film transistor connected to the first gate line and the data line, at least one color filter formed on the first thin film transistor, wherein the color filter comprises a first portion adjacent the first gate line with respect to the storage electrode line, a second portion adjacent the second gate line with respect to the storage electrode line, and a first connection connecting the first portion and the second portion and having a narrower width than that of the first and second portions, a first sub-pixel electrode formed on the color filter and connected to the first thin film transistor, and a second sub-pixel electrode facing the first sub-pixel electrode with respect to a gap, wherein at least one of an edge of the first sub-pixel electrode and an edge of the second sub-pixel electrode crosses over the first connection of the color filter, the edge of the first sub-pixel electrode, and the edge of the second sub-pixel electrode defining the gap between the first sub-pixel electrode and the second sub-pixel electrode.
摘要翻译： 薄膜晶体管阵列面板包括基板，形成在基板上的第一栅极线和第二栅极线，在第一栅极线和第二栅极线之间的存储电极线，与第一栅极线和第二栅极线相交的数据线 栅极线，连接到第一栅极线和数据线的第一薄膜晶体管，形成在第一薄膜晶体管上的至少一个滤色器，其中滤色器包括相对于存储器的第一栅极线的第一部分 电极线，相对于存储电极线相邻于第二栅极线的第二部分，以及连接第一部分和第二部分并且具有比第一和第二部分窄的宽度的第一连接，第一子像素 电极，形成在滤色器上并连接到第一薄膜晶体管，第二子像素电极相对于间隙面对第一子像素电极，其中至少在 第一子像素电极的边缘和第二子像素电极的边缘的第二子像素电极的边缘与滤色器的第一连接，第一子像素电极的边缘和第二子像素电极的边缘交叉 限定第一子像素电极和第二子像素电极之间的间隙的电极。
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公开(公告)号：US08097881B2
公开(公告)日：2012-01-17
申请号：US12502653
申请日：2009-07-14
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Jong-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Jong-In Kim
IPC分类号： H01L29/76 , H01L29/04 , H01L31/036 , H01L27/01 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/1225
摘要： An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.
摘要翻译： 氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极，邻近栅电极设置的氧化物半导体图案，与栅极线电绝缘的数据线，数据线和限定线 显示区域，暴露数据线的表面的第一开口，暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘，漏电极从第一开口延伸 到第二开口并电连接漏电极焊盘和氧化物半导体图案。
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公开(公告)号：US07880833B2
公开(公告)日：2011-02-01
申请号：US11930653
申请日：2007-10-31
申请人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
发明人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
IPC分类号： G02F1/1335 , G02F1/1343
CPC分类号： G02F1/133514 , G02F1/134309 , G02F2001/134345 , G02F2001/136222
摘要： A thin film transistor array panel includes a substrate, a first gate line and a second gate line formed on the substrate, a storage electrode line between the first gate line and the second gate line, a data line intersecting the first gate line and the second gate line, a first thin film transistor connected to the first gate line and the data line, at least one color filter formed on the first thin film transistor, wherein the color filter comprises a first portion adjacent the first gate line with respect to the storage electrode line, a second portion adjacent the second gate line with respect to the storage electrode line, and a first connection connecting the first portion and the second portion and having a narrower width than that of the first and second portions, a first sub-pixel electrode formed on the color filter and connected to the first thin film transistor, and a second sub-pixel electrode facing the first sub-pixel electrode with respect to a gap, wherein at least one of an edge of the first sub-pixel electrode and an edge of the second sub-pixel electrode crosses over the first connection of the color filter, the edge of the first sub-pixel electrode, and the edge of the second sub-pixel electrode defining the gap between the first sub-pixel electrode and the second sub-pixel electrode.
摘要翻译： 薄膜晶体管阵列面板包括基板，形成在基板上的第一栅极线和第二栅极线，在第一栅极线和第二栅极线之间的存储电极线，与第一栅极线和第二栅极线相交的数据线 栅极线，连接到第一栅极线和数据线的第一薄膜晶体管，形成在第一薄膜晶体管上的至少一个滤色器，其中滤色器包括相对于存储器的第一栅极线的第一部分 电极线，相对于存储电极线相邻于第二栅极线的第二部分，以及连接第一部分和第二部分并且具有比第一和第二部分窄的宽度的第一连接，第一子像素 电极，形成在滤色器上并连接到第一薄膜晶体管，第二子像素电极相对于间隙面对第一子像素电极，其中至少在 第一子像素电极的边缘和第二子像素电极的边缘的第二子像素电极的边缘与滤色器的第一连接，第一子像素电极的边缘和第二子像素电极的边缘交叉 限定第一子像素电极和第二子像素电极之间的间隙的电极。
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