公开(公告)号：US08389998B2

公开(公告)日：2013-03-05

申请号：US13444768

申请日：2012-04-11

申请人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

发明人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

IPC分类号： H01L27/14

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

公开(公告)号：US08097881B2

公开(公告)日：2012-01-17

申请号：US12502653

申请日：2009-07-14

申请人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Jong-In Kim

发明人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Jong-In Kim

IPC分类号： H01L29/76 ,  H01L29/04 ,  H01L31/036 ,  H01L27/01 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.

摘要翻译： 氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极，邻近栅电极设置的氧化物半导体图案，与栅极线电绝缘的数据线，数据线和限定线 显示区域，暴露数据线的表面的第一开口，暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘，漏电极从第一开口延伸 到第二开口并电连接漏电极焊盘和氧化物半导体图案。

公开(公告)号：US08174020B2

公开(公告)日：2012-05-08

申请号：US12556277

申请日：2009-09-09

申请人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

发明人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

IPC分类号： H01L27/14

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

公开(公告)号：US20120193634A1

公开(公告)日：2012-08-02

申请号：US13444768

申请日：2012-04-11

申请人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

发明人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

公开(公告)号：US20100140610A1

公开(公告)日：2010-06-10

申请号：US12556277

申请日：2009-09-09

申请人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jang-In Kim

发明人： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jang-In Kim

IPC分类号： H01L29/786 ,  H01L29/12 ,  H01L21/336

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

摘要翻译： 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

公开(公告)号：US08865528B2

公开(公告)日：2014-10-21

申请号：US12844356

申请日：2010-07-27

申请人： Jean-Ho Song ,  Shin-Il Choi ,  Sun-Young Hong ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jae-Hyoung Youn ,  Sung-Ryul Kim ,  O-Sung Seo ,  Yang-Ho Bae ,  Jong-Hyun Choung ,  Dong-Ju Yang ,  Bong-Kyun Kim ,  Hwa-Yeul Oh ,  Pil-Soon Hong ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Yu-Gwang Jeong ,  Jong-In Kim ,  Nam-Seok Suh

发明人： Jean-Ho Song ,  Shin-Il Choi ,  Sun-Young Hong ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jae-Hyoung Youn ,  Sung-Ryul Kim ,  O-Sung Seo ,  Yang-Ho Bae ,  Jong-Hyun Choung ,  Dong-Ju Yang ,  Bong-Kyun Kim ,  Hwa-Yeul Oh ,  Pil-Soon Hong ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Yu-Gwang Jeong ,  Jong-In Kim ,  Nam-Seok Suh

IPC分类号： H01L21/84 ,  H01L27/12

CPC分类号： H01L27/124 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/42368 ,  H01L29/458 ,  H01L29/78669

摘要： A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

摘要翻译： 薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层 覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。 数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。 栅极绝缘层可以具有台阶形状。

公开(公告)号：US20130001567A1

公开(公告)日：2013-01-03

申请号：US13604082

申请日：2012-09-05

申请人： Sung-Ryul KIM ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

发明人： Sung-Ryul KIM ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

IPC分类号： H01L33/08

CPC分类号： H01L29/78603 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/66765

摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，以及数据 其中所述数据线包括下数据层，上数据层，数据氧化层和缓冲层，其中所述上数据层和所述缓冲层包括相同的材料。

公开(公告)号：US08218110B2

公开(公告)日：2012-07-10

申请号：US12434945

申请日：2009-05-04

申请人： Jean-Ho Song ,  Yang-Ho Jung ,  Hoon Kang ,  Jae-Sung Kim ,  Jae-Hyoung Youn ,  Jong-In Kim ,  Sang-Soo Kim ,  Shi-Yul Kim

发明人： Jean-Ho Song ,  Yang-Ho Jung ,  Hoon Kang ,  Jae-Sung Kim ,  Jae-Hyoung Youn ,  Jong-In Kim ,  Sang-Soo Kim ,  Shi-Yul Kim

IPC分类号： G02F1/1335

CPC分类号： G02F1/136209 ,  B41J2202/09 ,  G02F1/133555 ,  G02F1/133707 ,  G02F1/13624 ,  G02F1/136286 ,  G02F2001/134345 ,  G02F2001/136222 ,  G02F2001/136231 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/41733

摘要： After increasing the thickness of a gate line and forming a barrier rib that is made of an organic material, a gate insulating layer is formed and then a color filter is formed with an Inkjet method using the barrier rib. By increasing a thickness of the gate line, even if the size of a substrate increases, problems due to signal delay are reduced, and by forming a barrier rib with an organic material, the height of the barrier rib increases, and a taper angle increases and thus a color filter is stably formed.

摘要翻译： 在增加栅极线的厚度并形成由有机材料制成的阻挡肋之后，形成栅极绝缘层，然后利用使用隔壁的喷墨法形成滤色器。 通过增加栅极线的厚度，即使基板的尺寸增加，由于信号延迟引起的问题减少，并且通过用有机材料形成隔壁，障壁的高度增加，并且锥角增加 从而稳定地形成滤色器。

公开(公告)号：US08304299B2

公开(公告)日：2012-11-06

申请号：US12821668

申请日：2010-06-23

申请人： Sung-Ryul Kim ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

发明人： Sung-Ryul Kim ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  O-Sung Seo ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Jong-In Kim ,  Jae-Jin Song

IPC分类号： H01L21/00

CPC分类号： H01L29/78603 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/66765

摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，以及数据 其中所述数据线包括下数据层，上数据层，数据氧化层和缓冲层，其中所述上数据层和所述缓冲层包括相同的材料。

公开(公告)号：US20110133193A1

公开(公告)日：2011-06-09

申请号：US12844356

申请日：2010-07-27

申请人： Jean-Ho SONG ,  Shin-Il Choi ,  Sun-Young Hong ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jae-Hyoung Youn ,  Sung-Ryul Kim ,  O-Sung Seo ,  Yang-Ho Bae ,  Jong-Hyun Choung ,  Dong-Ju Yang ,  Bong-Kyun Kim ,  Hwa-Yeul Oh ,  Pil-Soon Hong ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Yu-Gwang Jeong ,  Jong-In Kim ,  Nam-Seok Suh

发明人： Jean-Ho SONG ,  Shin-Il Choi ,  Sun-Young Hong ,  Shi-Yul Kim ,  Ki-Yeup Lee ,  Jae-Hyoung Youn ,  Sung-Ryul Kim ,  O-Sung Seo ,  Yang-Ho Bae ,  Jong-Hyun Choung ,  Dong-Ju Yang ,  Bong-Kyun Kim ,  Hwa-Yeul Oh ,  Pil-Soon Hong ,  Byeong-Beom Kim ,  Je-Hyeong Park ,  Yu-Gwang Jeong ,  Jong-In Kim ,  Nam-Seok Suh

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L27/124 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/42368 ,  H01L29/458 ,  H01L29/78669

摘要： A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

摘要翻译： 薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层 覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。 数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。 栅极绝缘层可以具有台阶形状。