THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20100140610A1

    公开(公告)日:2010-06-10

    申请号:US12556277

    申请日:2009-09-09

    摘要: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

    摘要翻译: 根据本发明实施例的薄膜晶体管基板包括:绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

    Thin film transistor array panel and method for manufacturing the same
    2.
    发明授权
    Thin film transistor array panel and method for manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US08389998B2

    公开(公告)日:2013-03-05

    申请号:US13444768

    申请日:2012-04-11

    IPC分类号: H01L27/14

    摘要: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

    摘要翻译: 根据本发明实施例的薄膜晶体管基板包括:绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

    Thin film transistor array panel and method for manufacturing the same
    3.
    发明授权
    Thin film transistor array panel and method for manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US08174020B2

    公开(公告)日:2012-05-08

    申请号:US12556277

    申请日:2009-09-09

    IPC分类号: H01L27/14

    摘要: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

    摘要翻译: 根据本发明实施例的薄膜晶体管基板包括:绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    4.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20120193634A1

    公开(公告)日:2012-08-02

    申请号:US13444768

    申请日:2012-04-11

    IPC分类号: H01L29/786 H01L21/336

    摘要: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

    摘要翻译: 根据本发明实施例的薄膜晶体管基板包括:绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

    Thin film transistor substrate and a fabricating method thereof
    5.
    发明授权
    Thin film transistor substrate and a fabricating method thereof 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US08097881B2

    公开(公告)日:2012-01-17

    申请号:US12502653

    申请日:2009-07-14

    CPC分类号: H01L29/7869 H01L27/1225

    摘要: An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.

    摘要翻译: 氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极,邻近栅电极设置的氧化物半导体图案,与栅极线电绝缘的数据线,数据线和限定线 显示区域,暴露数据线的表面的第一开口,暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘,漏电极从第一开口延伸 到第二开口并电连接漏电极焊盘和氧化物半导体图案。

    Thin film transistor array panel
    9.
    发明授权
    Thin film transistor array panel 有权
    薄膜晶体管阵列面板

    公开(公告)号:US08604469B2

    公开(公告)日:2013-12-10

    申请号:US12464920

    申请日:2009-05-13

    IPC分类号: H01L29/10

    摘要: A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.

    摘要翻译: 薄膜晶体管阵列面板包括基板,形成在基板上的栅极线,包括栅极电极,形成在栅极线上的栅极绝缘层,形成在栅极绝缘层上并包括薄膜晶体管的沟道的半导体 ,形成在半导体上的数据线,包括相对于薄膜晶体管的沟道形成在半导体上并与源电极相对的源电极和漏电极,其中薄膜晶体管的沟道覆盖两个侧表面 的栅电极。