公开(公告)号：US20090003049A1

公开(公告)日：2009-01-01

申请号：US12168742

申请日：2008-07-07

Applicant: Kwang-Jin LEE ,  Du-Eung KIM ,  Sang-Beom KANG ,  Woo-Yeong CHO

Inventor： Kwang-Jin LEE ,  Du-Eung KIM ,  Sang-Beom KANG ,  Woo-Yeong CHO

IPC: G11C11/00 ,  G11C7/00

CPC classification number: G11C5/145 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/79

Abstract: A phase change memory device includes a memory cell having a phase change material, a write driver adapted to supply a program current to the memory cell during a programming interval, and a pump circuit adapted to enhance a current supply capacity of the write driver during the programming interval. The pump circuit is activated prior to the programming interval in response to an external control signal.

Abstract translation: 相变存储器件包括具有相变材料的存储单元，适于在编程间隔期间向存储单元提供编程电流的写入驱动器，以及用于在写入驱动器期间增强写入驱动器的电流供应容量的泵电路 编程间隔。 泵电路响应于外部控制信号在编程间隔之前被激活。

公开(公告)号：US20080144363A1

公开(公告)日：2008-06-19

申请号：US11953146

申请日：2007-12-10

Applicant: Chang-Soo LEE ,  Hyung-Rok OH ,  Beak-Hyung CHO ,  Kwang-Jin LEE

Inventor： Chang-Soo LEE ,  Hyung-Rok OH ,  Beak-Hyung CHO ,  Kwang-Jin LEE

IPC: G11C11/00 ,  G11C29/00 ,  G11C8/00

CPC classification number: G11C29/08 ,  G11C13/0004

Abstract: A method of testing PRAM devices is disclosed. The method simultaneously writes input data to a plurality of memory banks by writing set data to a first group of memory banks and writing reset data to a second group of memory banks, performs a write operation test by comparing data read from the plurality of memory banks with corresponding input data, and determines a fail cell in relation to the test results.

Abstract translation: 公开了一种测试PRAM设备的方法。 该方法通过将设置数据写入第一组存储体并将复位数据写入第二组存储体，同时将输入数据写入多个存储体，通过比较从多个存储体读取的数据执行写操作测试 与相应的输入数据相关，并确定与测试结果相关的故障单元。

公开(公告)号：US20100232218A1

公开(公告)日：2010-09-16

申请号：US12787571

申请日：2010-05-26

Applicant: Chang-Soo LEE ,  Hyung-Rok OH ,  Beak-Hyung CHO ,  Kwang-Jin LEE

Inventor： Chang-Soo LEE ,  Hyung-Rok OH ,  Beak-Hyung CHO ,  Kwang-Jin LEE

IPC: G11C11/00 ,  G11C29/00 ,  G11C8/00

CPC classification number: G11C29/08 ,  G11C13/0004

Abstract: A method of testing PRAM devices is disclosed. The method simultaneously writes input data to a plurality of memory banks by writing set data to a first group of memory banks and writing reset data to a second group of memory banks, performs a write operation test by comparing data read from the plurality of memory banks with corresponding input data, and determines a fail cell in relation to the test results.

Abstract translation: 公开了一种测试PRAM设备的方法。 该方法通过将设置数据写入第一组存储体并将复位数据写入第二组存储体，同时将输入数据写入多个存储体，通过比较从多个存储体读取的数据执行写操作测试 与相应的输入数据相关，并确定与测试结果相关的故障单元。

公开(公告)号：US20080068872A1

公开(公告)日：2008-03-20

申请号：US11892851

申请日：2007-08-28

Applicant: Kwang-Jin LEE ,  Du-eung KIM

Inventor： Kwang-Jin LEE ,  Du-eung KIM

IPC: G11C15/00

CPC classification number: G11C15/046 ,  G11C13/0004

Abstract: According to an example embodiment, a CAM cell included in a CAM may include a phase change memory device, a connector, and/or a developer. The phase change memory device may be configured to store data. The phase change memory device may have a resistance that may be varied according to the logic level of the stored data. The connector may be configured to control writing data to the phase change memory device and reading data from the phase change memory device. The developer may be configured to control reading data from the phase change memory device in a search mode in which the data stored in the phase change memory device is compared to the search data.

Abstract translation: 根据示例实施例，CAM中包括的CAM单元可以包括相变存储器件，连接器和/或显影器。 相变存储器件可以被配置为存储数据。 相变存储器件可以具有可以根据存储的数据的逻辑电平而改变的电阻。 连接器可以被配置为控制向相变存储器件写入数据并从相变存储器件读取数据。 开发者可以被配置为在存储在相变存储器件中的数据与搜索数据进行比较的搜索模式中控制从相变存储器件读取数据。

公开(公告)号：US20090321344A1

公开(公告)日：2009-12-31

申请号：US12486112

申请日：2009-06-17

Applicant: Kwang-Jin LEE ,  Moo-Seok LEE ,  Yong-Cheol SHIN

Inventor： Kwang-Jin LEE ,  Moo-Seok LEE ,  Yong-Cheol SHIN

IPC: B01D63/00 ,  B01D35/30

CPC classification number: B01D63/02 ,  B01D2313/21

Abstract: A header for filtering membrane module and a filtering membrane module using the same is disclosed, which is capable of maximizing efficiency in power consumption by securing a constant flow of permeate through the use of a relatively-low negative pressure, the header for filtering membrane module comprising a body with a permeate collecting space therein; and a conduit at one end of the body, the conduit being in fluid communication with the permeate collecting space, wherein at least a portion of the permeate collecting space has an inclined shape.

Abstract translation: 公开了用于过滤膜组件的头部和使用其的过滤膜组件，其能够通过使用相对低的负压确保渗透物的恒定流量来最大化功率消耗的效率，用于过滤膜组件 包括其中具有渗透物收集空间的主体; 以及在所述主体的一端处的导管，所述导管与所述渗透物收集空间流体连通，其中所述渗透物收集空间的至少一部分具有倾斜形状。