公开(公告)号：US07382308B1

公开(公告)日：2008-06-03

申请号：US11676026

申请日：2007-02-16

申请人： Enzhu Liang ,  Xuecheng Jin

发明人： Enzhu Liang ,  Xuecheng Jin

IPC分类号： H03M1/38

CPC分类号： G05F3/262 ,  H03M1/168

摘要： A reference buffer includes a first current mirror, a second current mirror, a first source follower coupled in series to a branch of the first current mirror and receiving a first initial reference voltage and outputting a first reference voltage, a second source follower coupled in series to a branch of the second current mirror and receiving a second initial reference voltage and outputting a second reference voltage, and a resistor coupled between a first node and a second node outputting the first and second reference voltages, respectively. The first node is disposed between the first current mirror and the first source follower and the second node is disposed between the second current mirror and the second source follower. The voltage difference between the first reference voltage and the first initial reference voltage is substantially same as that between the second reference voltage and the second initial reference voltage.

摘要翻译： 参考缓冲器包括第一电流镜，第二电流镜，与第一电流镜的分支串联耦合的第一源极跟随器，并接收第一初始参考电压并输出第一参考电压，串联耦合的第二源极跟随器 耦合到第二电流镜的分支并且接收第二初始参考电压并输出第二参考电压，以及耦合在第一节点和第二节点之间的电阻器，分别输出第一和第二参考电压。 第一节点设置在第一电流镜和第一源极跟随器之间，第二节点设置在第二电流镜和第二源极跟随器之间。 第一参考电压和第一初始参考电压之间的电压差基本上与第二参考电压和第二初始参考电压之间的电压差相同。

公开(公告)号：US5982709A

公开(公告)日：1999-11-09

申请号：US52818

申请日：1998-03-31

申请人： Igal Ladabaum ,  Xuecheng Jin ,  Butrus T. Khuri-Yakub

发明人： Igal Ladabaum ,  Xuecheng Jin ,  Butrus T. Khuri-Yakub

IPC分类号： H01L41/09 ,  H04R17/00

CPC分类号： H01L41/0973

摘要： There is provided an acoustic transducer which includes a membrane of selected size and shape supported at its edges spaced from a first conductive electrode by an integral support structure with the second conductive electrode comprising a thin metal film on the membrane. The active membrane area is undisturbed by etch vias.

摘要翻译： 提供了一种声换能器，其包括选定尺寸和形状的膜，其膜的边缘通过整体支撑结构与第一导电电极间隔开，第二导电电极在膜上包括薄金属膜。 活性膜面积不受蚀刻通孔的干扰。

公开(公告)号：US08581568B2

公开(公告)日：2013-11-12

申请号：US12907777

申请日：2010-10-19

申请人： Enzhu Liang ,  Jiang Chen ,  Xuecheng Jin

发明人： Enzhu Liang ,  Jiang Chen ,  Xuecheng Jin

IPC分类号： G05F3/16

CPC分类号： H02M1/36 ,  H02M3/33523 ,  H02M2001/0006

摘要： A start-up circuit in a switch-mode power converter that employs a Zener diode to provide a reference voltage to reduce the power consumption and the size of the start-up circuit. The start-up circuit also includes a coarse current source and a coarse reference voltage signal generator for producing current and reference voltage for initial startup operation of a bandgap circuit. The reference signal and current from coarse current source and the reference voltage signal generator are subject to large process, voltage and temperature (PVT) variations or susceptible to noise from the power supply, and hence, these signals are used temporarily during start-up and replaced with signals from higher performance components. After bandgap circuit becomes operational, the start-up receives voltage reference signal from the bandgap circuit to more accurately detect undervoltage lockout conditions.

摘要翻译： 开关电源转换器中的启动电路采用齐纳二极管来提供参考电压，以降低功耗和起动电路的尺寸。 启动电路还包括粗电流源和用于产生用于带隙电路的初始启动操作的电流和参考电压的粗略参考电压信号发生器。 来自粗电流源和参考电压信号发生器的参考信号和电流受到大的工艺，电压和温度（PVT）变化或易受电源噪声影响，因此这些信号在启动期间暂时使用， 取代了来自更高性能组件的信号。 带隙电路工作后，启动接收来自带隙电路的电压参考信号，以更准确地检测欠压锁定条件。

公开(公告)号：US20130147374A1

公开(公告)日：2013-06-13

申请号：US13314103

申请日：2011-12-07

申请人： Minjong Kim ,  Enzhu Liang ,  Xuecheng Jin

发明人： Minjong Kim ,  Enzhu Liang ,  Xuecheng Jin

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  H05B33/0824 ,  H05B37/02

摘要： An LED driver controls current through an LED string. The LED driver generates a boosted PWM signal to drive a PWM transistor in the LED current path such that the PWM transistor maintains a substantially constant VGS, thus minimizing turn-on impedance of the PWM transistor. A current mirror circuit controls peak LED current when the PWM transistor is on. A trimming circuit includes a set of programmable switches to couple or decouple trimming transistor from the LED current path, and allowing for fine calibration of the LED current. By maintaining a low resistance and compensating for current mismatch in the LED current path, the LED driver provides efficient power performance and robustness that is particularly beneficial in high current applications.

摘要翻译： LED驱动器通过LED灯串控制电流。 LED驱动器产生升高的PWM信号以驱动LED电流路径中的PWM晶体管，使得PWM晶体管保持基本上恒定的VGS，从而最小化PWM晶体管的导通阻抗。 当PWM晶体管导通时，电流镜电路控制峰值LED电流。 修整电路包括一组可编程开关，用于将修整晶体管与LED电流路径耦合或去耦，并允许精确校准LED电流。 通过保持低电阻并补偿LED电流路径中的电流失配，LED驱动器提供了有效的功率性能和鲁棒性，这在大电流应用中特别有益。

公开(公告)号：US20130127344A1

公开(公告)日：2013-05-23

申请号：US13675515

申请日：2012-11-13

申请人： Xuecheng Jin ,  Yu Chong Chang ,  Yang Li ,  Maofeng Lan ,  John W. Kesterson ,  Xiaoyan Wang ,  Chenghung Pan

发明人： Xuecheng Jin ,  Yu Chong Chang ,  Yang Li ,  Maofeng Lan ,  John W. Kesterson ,  Xiaoyan Wang ,  Chenghung Pan

IPC分类号： H05B33/08

CPC分类号： H05B33/0842 ,  H01L22/14 ,  H01L2924/0002 ,  H05B33/0818 ,  H05B33/0827 ,  Y02B20/341 ,  H01L2924/00

摘要： An adaptive switch mode LED driver provides an intelligent approach to driving multiple strings of LEDs. The LED driver determines an optimal current level for each LED channel from a limited set of allowed currents. The LDO driver then determines a PWM duty cycle for driving the LEDs in each LED channel to provide precise brightness control over the LED channels. Beneficially, the LED driver minimizes the power dissipation in the LDO circuits driving each LED string, while also ensuring that the currents in each LED string are maintained within a limited range. A sample and hold LDO allows PWM control over extreme duty cycles with very fast dynamic response. Furthermore, fault protection circuitry ensures fault-free startup and operation of the LED driver.

摘要翻译： 自适应开关模式LED驱动器提供了一种智能方法来驱动多串LED。 LED驱动器从有限的一组允许电流确定每个LED通道的最佳电流电平。 然后，LDO驱动器确定用于驱动每个LED通道中的LED的PWM占空比，以在LED通道上提供精确的亮度控制。 有利的是，LED驱动器使驱动每个LED串的LDO电路的功耗最小化，同时还确保每个LED串中的电流保持在有限的范围内。 采样和保持LDO允许通过非常快的动态响应对极端占空比进行PWM控制。 此外，故障保护电路确保LED驱动器的无故障启动和操作。

公开(公告)号：US07739626B2

公开(公告)日：2010-06-15

申请号：US11738222

申请日：2007-04-20

申请人： Xuecheng Jin ,  Andrey B Malinin ,  John W. Kesterson

发明人： Xuecheng Jin ,  Andrey B Malinin ,  John W. Kesterson

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F2217/78

摘要： A method and system of system-on-chip design that provides the benefits of reduced design time, a smaller die size, lower power consumption, and reduced costs in chip design and production. The process seeks to remove the worst performance and worst power case scenarios from the design and application phases. This is accomplished by planning the power supply voltage in the design phase along with its tolerance with process corner and temperature combinations. The established plan is then applied with communications between power supply integrated circuits and load system-on-chip.

摘要翻译： 系统级芯片设计的方法和系统提供减少设计时间，更小的芯片尺寸，更低的功耗以及降低芯片设计和生产成本的优势。 该过程旨在从设计和应用阶段中消除最差的性能和最坏的功耗情况。 这是通过在设计阶段规划电源电压以及其与过程角和温度组合的公差来实现的。 然后将已建立的计划应用于电源集成电路和负载片上系统之间的通信。

公开(公告)号：US20100111241A1

公开(公告)日：2010-05-06

申请号：US12266383

申请日：2008-11-06

申请人： John W. Kesterson ,  Carrie Seim ,  Selcuk Sen ,  Xuecheng Jin

发明人： John W. Kesterson ,  Carrie Seim ,  Selcuk Sen ,  Xuecheng Jin

IPC分类号： H03D3/24

CPC分类号： H03L7/07 ,  H03L7/081 ,  H03L7/085 ,  H03L7/0994 ,  H03L2207/50

摘要： A digital phase lock loop circuit with reduced jitter at the output is disclosed. The digital phase lock loop circuit includes a phase frequency detector that determines a phase difference between a feedback signal and a reference frequency signal to generate an error signal indicative of the phase difference. A numerically controlled oscillator generates a first oscillator output signal with a frequency proportional to the error signal and a second oscillator output signal indicative of jitter of the first oscillator output signal in reference to the reference frequency signal. A phase accuracy extender determines a delay amount from the second oscillator output signal and delays the first oscillator output signal by the delay amount to generate a phase-enhanced output signal with edges aligned with one of a plurality of reference clock signals.

摘要翻译： 公开了一种在输出端具有减小的抖动的数字锁相环电路。 数字锁相环电路包括相位频率检测器，其确定反馈信号和参考频率信号之间的相位差，以产生指示相位差的误差信号。 数控振荡器产生与误差信号成比例的频率的第一振荡器输出信号和指示参考频率信号的第一振荡器输出信号的抖动的第二振荡器输出信号。 相位精度延长器确定来自第二振荡器输出信号的延迟量，并将第一振荡器输出信号延迟延迟量，以产生具有与多个参考时钟信号之一对准的相位增强输出信号。

公开(公告)号：US07336058B1

公开(公告)日：2008-02-26

申请号：US11671793

申请日：2007-02-06

申请人： Ping Lo ,  Xuecheng Jin

发明人： Ping Lo ,  Xuecheng Jin

IPC分类号： G05F1/40

CPC分类号： G05F1/575

摘要： A low dropout (LDO) voltage regulator having more than one LDO modules, each LDO module having a frequency response adapted to a certain range of output frequency. The LDO voltage regulator can provide a gain over a broad range of operating frequency by combining output current from each LDO module and providing the combined current at an output of the LDO voltage regulator. The LDO voltage regulator further comprises a load monitor coupled to the LDO modules for disabling some of the LDO modules to reduce power consumption of the LDO voltage regulator.

摘要翻译： 具有多于一个LDO模块的低压降（LDO）稳压器，每个LDO模块具有适应于一定范围的输出频率的频率响应。 LDO稳压器可以通过组合来自每个LDO模块的输出电流并在LDO稳压器的输出端提供组合电流，在宽范围的工作频率范围内提供增益。 LDO稳压器还包括耦合到LDO模块的负载监视器，用于禁用一些LDO模块以降低LDO电压调节器的功耗。

公开(公告)号：US20060158365A1

公开(公告)日：2006-07-20

申请号：US11316636

申请日：2005-12-21

申请人： Kent Kernahan ,  Xuecheng Jin ,  Ping Lo ,  Ion Opris ,  Sorin Spanoche

发明人： Kent Kernahan ,  Xuecheng Jin ,  Ping Lo ,  Ion Opris ,  Sorin Spanoche

IPC分类号： H03M1/12

CPC分类号： H03M1/38

摘要： Methods and devices are disclosed for performing analog to digital signal conversion in shorter time and/or with less power consumption than that of a comparable analog to digital conversion that uses a conventional sequential approximation method based on a binary search. In one embodiment, a predictive guess is supplied as a digital first signal. The digital first signal is converted (D/A) to a counterpart, analog guess signal. A comparison is made between the analog guess signal and a received, analog input sample signal. The result of the comparison is used to improve on the initially supplied guess in a next cycle. Fewer cycles and less power is consumed if the initial guess is within a certain range of the actual magnitude of the analog input sample signal. In one embodiment, a digital modeler is used to model a process underlying the analog input sample signal and to thereby provide fairly good guesses.

摘要翻译： 公开了用于在较短时间内和/或具有比使用基于二进制搜索的常规顺序近似方法的可比较模数转换的功耗更少的时间和/或执行模数转换的方法和装置。 在一个实施例中，预测猜测被提供为数字第一信号。 数字第一信号被转换（D / A）到对应的模拟猜测信号。 比较模拟猜测信号和接收的模拟输入采样信号。 比较结果用于在下一个周期中提高初始提供的猜测。 如果初始猜测在模拟输入采样信号的实际幅度的一定范围内，则消耗更少的周期和更少的功率。 在一个实施例中，数字建模器用于对模拟输入采样信号的过程进行建模，从而提供相当好的猜测。

公开(公告)号：US20130169172A1

公开(公告)日：2013-07-04

申请号：US13339196

申请日：2011-12-28

申请人： John William Kesterson ,  Xiaoyan Wang ,  Xuecheng Jin ,  Enzhu Liang ,  Selcuk Sen

发明人： John William Kesterson ,  Xiaoyan Wang ,  Xuecheng Jin ,  Enzhu Liang ,  Selcuk Sen

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  Y02B20/346

摘要： A system controls a switching power converter to power LED strings using a predictive feedforward control mechanism. An LED controller determines programmed current levels and duty cycles for driving LED strings. The LED controller determines a predicted load for a subsequent cycle of a switching power converter driving the LED strings based on the programmed current levels and duty cycles. A power conversion controller uses the predicted load information to control switching of the switching power converter. This improves the dynamic response of the switching converter to changing load conditions, thereby improving overall power efficiency and performance of the system.

摘要翻译： 系统使用预测前馈控制机制控制开关功率转换器为LED串供电。 LED控制器确定用于驱动LED串的编程电流电平和占空比。 LED控制器基于编程的电流电平和占空比确定驱动LED串的开关功率转换器的后续周期的预测负载。 电力转换控制器使用预测负载信息来控制开关功率转换器的开关。 这改善了开关转换器对变化的负载条件的动态响应，从而提高了系统的整体功率效率和性能。