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    ALICYCLIC[C] BENZOPYRONE DERIVATIVES AND USES THEREOF
    11.
    发明申请
    ALICYCLIC[C] BENZOPYRONE DERIVATIVES AND USES THEREOF 有权
    ALICYCLIC [C]苯并噻吩衍生物及其用途

    公开(公告)号：US20140171442A1

    公开(公告)日：2014-06-19

    申请号：US14236208

    申请日：2012-07-31

    Applicant: Guisen Zhang ,  Yin Chen ,  Xiangqing Xu ,  Xin Liu ,  Song Zhao ,  Bifeng Liu ,  Miquan Yu ,  Yinli Qiu

    Inventor： Guisen Zhang ,  Yin Chen ,  Xiangqing Xu ,  Xin Liu ,  Song Zhao ,  Bifeng Liu ,  Miquan Yu ,  Yinli Qiu

    IPC: C07D311/94 ,  C07D413/14 ,  C07D417/12 ,  C07D409/12

    CPC classification number: C07D311/94 ,  A61K31/453 ,  A61K31/454 ,  A61K31/496 ,  C07D311/80 ,  C07D405/12 ,  C07D409/12 ,  C07D413/14 ,  C07D417/12 ,  C07D417/14

    Abstract: Disclosed are alicyclic[c]benzopyrone derivatives and use thereof. The alicyclic[c]benzopyrone derivatives are compounds represented by formula I or their salts. The present compounds not only significantly improve high activity induced by MK-801, but also effectively improve clambering symptom induced by Apomorphine and do not cause EPS within effective dose. These in vitro targets and in vivo pharmacological models are closely related to diseases of the nervous system caused by dopamine dysfunction, especially schizophrenia. Therefore the present compounds can be used for the treatment of central nervous system diseases, especially schizophrenia. ED50 is lower and effect is stronger in two animal models i.e. high activity induced by MK-801 and clambering symptom induced by Apomorphine, while ED50 is higher and therapeutic index is greater in animal models of catalepsy.

    Abstract translation: 公开了脂环族[c]苯并吡喃酮衍生物及其用途。 脂环式[c]苯并吡喃酮衍生物是由式I表示的化合物或其盐。 本发明化合物不仅显着改善了MK-801诱导的高活性，而且有效地改善了阿扑吗啡引起的痉挛症状，不会有效剂量引起EPS。 这些体外靶标和体内药理学模型与由多巴胺功能障碍，特别是精神分裂症引起的神经系统疾病密切相关。 因此，本发明化合物可用于治疗中枢神经系统疾病，特别是精神分裂症。 ED50较低，两种动物模型中效果更强，即由MK-801诱导的高活性和阿扑吗啡引起的痉挛症状，而ED50较高，而在僵住症的动物模型中治疗指数更高。

    Nonvolatile memory device and method of forming the same
    13.
    发明申请
    Nonvolatile memory device and method of forming the same 有权
    非易失存储器件及其形成方法

    公开(公告)号：US20070040211A1

    公开(公告)日：2007-02-22

    申请号：US11209145

    申请日：2005-08-22

    Applicant: Shao Ku ,  Yin Chen ,  Wenpin Lu ,  Tahui Wang

    Inventor： Shao Ku ,  Yin Chen ,  Wenpin Lu ,  Tahui Wang

    IPC: H01L29/792

    CPC classification number: H01L29/7923 ,  H01L29/1045

    Abstract: A multi-bit memory cell includes a substrate; a multi-bit charge-trapping cell over the substrate, the multi-bit charge-trapping cell having a first lateral side and a second lateral side; a source region in the substrate, a portion of the source region being under the first side of the multi-bit charge-trapping cell; a drain region in the substrate, a portion of the drain region being under the second side of the multi-bit charge-trapping cell; and a channel region in the substrate between the source region and the drain region. The channel region has one of a p-type doping and an n-type doping, and the doping is configured to provide a highest doping concentration near the central portion of the channel region.

    Abstract translation: 多位存储单元包括基板; 位于衬底上的多位电荷俘获电池，所述多位电荷俘获电池具有第一侧面和第二侧面; 源区域，源区域中的一部分位于多位电荷捕获单元的第一侧之下; 所述衬底中的漏极区域，所述漏极区域的一部分位于所述多位电荷俘获电池的第二侧的下方; 以及在源极区域和漏极区域之间的衬底中的沟道区域。 沟道区具有p型掺杂和n型掺杂之一，并且掺杂被配置为在沟道区的中心部分附近提供最高的掺杂浓度。

    Diode-less array for one-time programmable memory
    17.
    发明申请
    Diode-less array for one-time programmable memory 有权
    一次可编程存储器的无二极管阵列

    公开(公告)号：US20070133248A1

    公开(公告)日：2007-06-14

    申请号：US11297529

    申请日：2005-12-08

    Applicant: Kuan Chen ,  Yin Chen ,  Tzung Han ,  Ming Chen

    Inventor： Kuan Chen ,  Yin Chen ,  Tzung Han ,  Ming Chen

    IPC: G11C17/00

    CPC classification number: G11C17/16 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/101

    Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

    Abstract translation: 一次可编程存储器阵列包括在第一行方向上延伸并且设置在第一高度的第一行导体，在第二行方向上延伸并设置在第二高度的第二行导体和沿列方向延伸的列导体 并且设置成与第一行导体相邻并且与第二行导体相邻。 阵列还包括覆盖列导体的至少一部分的电介质层，耦合在列导体上的电介质层和第二行导体之间的熔丝链。

    NAND type multi-bit charge storage memory array and methods for operating and fabricating the same
    18.
    发明申请
    NAND type multi-bit charge storage memory array and methods for operating and fabricating the same 有权
    NAND型多位电荷存储器阵列及其操作和制造方法

    公开(公告)号：US20070115723A1

    公开(公告)日：2007-05-24

    申请号：US11285919

    申请日：2005-11-23

    Applicant: Yin Chen ,  Chun Su ,  Ming Chin ,  Chih Yeh ,  Tzung Han

    Inventor： Yin Chen ,  Chun Su ,  Ming Chin ,  Chih Yeh ,  Tzung Han

    IPC: G11C16/04

    CPC classification number: G11C16/0483 ,  H01L27/115 ,  H01L27/11568

    Abstract: A NAND type multi-bit charge storage memory array comprises a first and a second memory strings each of which includes one or more charge storage memory cells and two select transistors. The charge storage memory cells are connected in series to form a memory cell string. The two select transistors are connected in series to both ends of the memory cell string, respectively. The NAND type multi-bit charge storage memory array further comprises a shared bit line and a first and a second bit lines. The shared bit line is connected with the first ends of the first and the second memory strings. The first and the second bit lines are connected to the second ends of the first and the second memory strings, respectively. The first select transistor and the second select transistor of each memory string are controlled by a first and a second select transistor control lines, respectively.

    Abstract translation: NAND型多位电荷存储存储器阵列包括第一和第二存储器串，每个存储器串包括一个或多个电荷存储存储单元和两个选择晶体管。 电荷存储存储单元串联连接以形成存储单元串。 两个选择晶体管分别串联连接到存储单元串的两端。 NAND型多位电荷存储存储器阵列还包括共享位线和第一位线和第二位线。 共享位线与第一和第二存储器串的第一端连接。 第一和第二位线分别连接到第一和第二存储器串的第二端。 每个存储器串的第一选择晶体管和第二选择晶体管分别由第一和第二选择晶体管控制线控制。

    Compositions and methods for the analysis of mucin gene expression and identification of drugs having the ability to inhibit mucin gene expression
    20.
    发明授权
    Compositions and methods for the analysis of mucin gene expression and identification of drugs having the ability to inhibit mucin gene expression 有权
    用于分析粘蛋白基因表达和鉴定具有抑制粘蛋白基因表达能力的药物的组合物和方法

    公开(公告)号：US06818446B2

    公开(公告)日：2004-11-16

    申请号：US09990613

    申请日：2001-11-21

    Applicant: Reen Wu ,  Yin Chen

    Inventor： Reen Wu ,  Yin Chen

    IPC: C12N1574

    CPC classification number: C07K14/4727

    Abstract: The invention relates to compositions and methods for the assessment of mucin gene expression. The invention also relates to compositions and methods for the identification of compounds useful in the treatment of various disorders caused by mucin overproduction. The invention provides novel MUC5B promoter sequences and reporter constructs comprising these MUC5B promoter sequences. The invention further provides methods for drug screening to identify compounds have the ability to inhibit MUC5B gene expression. Compounds having the ability to inhibit MUC5B gene expression find use in the treatment of diseases characterized by mucin hyperproduction.

    Abstract translation: 本发明涉及用于评估粘蛋白基因表达的组合物和方法。 本发明还涉及用于鉴定可用于治疗由粘蛋白过量产生引起的各种疾病的化合物的组合物和方法。 本发明提供新的MUC5B启动子序列和包含这些MUC5B启动子序列的报道构建体。 本发明进一步提供用于药物筛选以鉴定化合物具有抑制MUC5B基因表达的能力的方法。 具有抑制MUC5B基因表达能力的化合物可用于治疗以粘蛋白过量产生为特征的疾病。

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