公开(公告)号：US5900768A

公开(公告)日：1999-05-04

申请号：US971519

申请日：1997-11-17

Applicant: Kyle J. Price

Inventor： Kyle J. Price

IPC: H03K17/00 ,  H03K17/22

CPC classification number: H03K17/223 ,  H03K2217/0036

Abstract: The present invention relates to a circuit that pulls down the power supply line in an electronic system to a low state when the electronic system is turned off. More specifically, the present invention is an active circuit that establishes a low impedance between a power supply line and a return line when a system's power is turned off, and establishes a high impedance between a power supply line and a return line when the system is turned on.

Abstract translation: 本发明涉及一种在电子系统关闭时将电子系统中的电源线拉低至低状态的电路。 更具体地说，本发明是一种有源电路，当系统关闭电源时，在电源线和返回线路之间建立低阻抗，并且当系统为系统时，在供电线路和返回线路之间建立高阻抗 打开。

公开(公告)号：US5892929A

公开(公告)日：1999-04-06

申请号：US777230

申请日：1996-12-30

Applicant: Mark W. Welker

Inventor： Mark W. Welker

IPC: G06F12/06 ,  G06F13/376

CPC classification number: G06F12/0669 ,  G06F12/0661

Abstract: A method and apparatus of assuring uniqueness of identification numbers of bus devices connected to a bus. Each bus device has a current identification number. At each of the bus devices, an identification number is received on a bus and the bus is contended for based on the received identification number. If more than one bus device is detected contending for the bus, the current identification number of one of the bus devices is changed. Each of the bus devices compares the received identification number to the current identification number of the bus device. A bus device provides a match indication, including driving a signal, if the comparison produces a match. Each bus device includes a collision detector for detecting if more than one bus device is driving the signal.

Abstract translation: 确保连接到总线的总线设备的识别号的唯一性的方法和装置。 每个总线设备具有当前标识号。 在每个总线装置上，在总线上接收识别号码，并根据所接收的标识号码对总线进行竞争。 如果检测到总线上有多个总线设备，则总线设备之一的当前标识号被改变。 每个总线装置将接收到的标识号与总线装置的当前标识号进行比较。 如果比较产生匹配，则总线装置提供匹配指示，包括驱动信号。 每个总线装置包括用于检测多于一个总线装置正在驱动该信号的碰撞检测器。

公开(公告)号：US5872781A

公开(公告)日：1999-02-16

申请号：US920936

申请日：1997-08-29

Applicant: Arthur T. Bennett ,  K. Arlan Harris

Inventor： Arthur T. Bennett ,  K. Arlan Harris

IPC: G06F13/00 ,  H04L12/413 ,  H04L12/44 ,  H04L12/46 ,  H04L12/56 ,  H04L29/06 ,  H04J3/22

CPC classification number: H04L29/06 ,  H04L12/44 ,  H04L12/462 ,  H04L12/5693 ,  H04L47/6225 ,  H04L49/90 ,  H04L49/9063 ,  H04L12/4625 ,  H04L69/08 ,  H04L69/18

Abstract: A network (10) includes a repeater (12) that can service data devices that operate using different communications protocols. The data devices (18, 20, 22) couple to the ports (34) of the repeater (12), and operate using a first communications protocol in a first domain (14). The data devices (26, 28, 30) also couple to the ports (34) of the repeater (12) and operate using a second communications protocol in a second domain (16). Information on the operation of a port (34) may be displayed using one port indicator (202) or two port indicators (300, 302).

Abstract translation: 网络（10）包括可以为使用不同通信协议操作的数据设备提供服务的中继器（12）。 数据设备（18,20,22）耦合到中继器（12）的端口（34），并且使用第一域（14）中的第一通信协议进行操作。 数据设备（26,28,30）还耦合到中继器（12）的端口（34），并且在第二域（16）中使用第二通信协议进行操作。 可以使用一个端口指示器（202）或两个端口指示器（300,302）来显示关于端口（34）的操作的信息。

公开(公告)号：US5867676A

公开(公告)日：1999-02-02

申请号：US699918

申请日：1996-08-20

Applicant: Vincent Nguyen ,  Paul V. Brownell

Inventor： Vincent Nguyen ,  Paul V. Brownell

IPC: G06F13/36 ,  G06F1/24 ,  G06F13/40 ,  G06F13/00

CPC classification number: G06F13/4027 ,  G06F1/24

Abstract: A reset circuit for a computer system having PCI chip set, the reset circuit for resetting a PCI data bus in the event of a warm boot in the computer system to prevent corrupt data files, the reset circuit including a logical AND gate with a first input connected to a cold boot reset pin of the PMC, and an output connected to a PCI data bus; a logical OR gate with a first input connected to the flush pin of the PMC and an output connected to a second input of the logical AND gate; an inverter with an input connected to the flush pin of the PMC; and a delay device connected between an output of the inverter and a second input of the logical OR gate.

Abstract translation: 一种用于具有PCI芯片组的计算机系统的复位电路，该复位电路用于在计算机系统中热启动时重置PCI数据总线以防止损坏的数据文件，复位电路包括具有第一输入的逻辑与门 连接到PMC的冷启动复位引脚，以及连接到PCI数据总线的输出; 逻辑或门，具有连接到PMC的闪存引脚的第一输入和连接到逻辑与门的第二输入的输出; 具有与PMC的冲销相连的输入的逆变器; 以及连接在反相器的输出端与逻辑或门的第二输入端之间的延迟器件。

公开(公告)号：US5859911A

公开(公告)日：1999-01-12

申请号：US840795

申请日：1997-04-16

Applicant: Michael F. Angelo ,  Sompong P. Olarig ,  George D. Wisecup

Inventor： Michael F. Angelo ,  Sompong P. Olarig ,  George D. Wisecup

IPC: G06F12/14 ,  G06F21/00 ,  H04K1/00

CPC classification number: G06F21/572 ,  G06F12/1408 ,  G06F2211/1097

Abstract: In a computer system having a receiving computer and a source computer, a method for the remote flashing of the BIOS in the receiving computer including the steps of transferring the flash information from the source computer to the receiving computer, with the flash information including the flash code, the flash code instructions and an encrypted digital signature corresponding to the flash code. The receiving computer is operably placed in a secure mode. A hash value corresponding to the flash information is calculated, and the hash value from the flash information is decrypted. The flash code is validated by comparing the decrypted hash value of the flash information to the calculated hash value, and if validated, the BIOS if flashed with the new flash code.

Abstract translation: 在具有接收计算机和源计算机的计算机系统中，用于在接收计算机中远程闪烁BIOS的方法包括以下步骤：将闪存信息从源计算机传送到接收计算机，闪存信息包括闪存 代码，闪存代码指令和对应于闪存代码的加密数字签名。 接收计算机可操作地置于安全模式。 计算与闪光信息对应的散列值，对来自闪光灯信息的哈希值进行解密。 闪存代码通过将闪存信息的解密散列值与计算出的散列值进行比较来验证，如果验证，则BIOS将使用新的闪存代码闪烁。

公开(公告)号：US5855483A

公开(公告)日：1999-01-05

申请号：US812917

申请日：1997-03-10

Applicant: Roger Collins ,  Tony Robinson ,  Yolanda Jenkins ,  Karla DiGrazia ,  Stuart Ozer ,  Bryan Freedman ,  Maurice Voce ,  Jane Devon ,  Chris Briggs

Inventor： Roger Collins ,  Tony Robinson ,  Yolanda Jenkins ,  Karla DiGrazia ,  Stuart Ozer ,  Bryan Freedman ,  Maurice Voce ,  Jane Devon ,  Chris Briggs

IPC: G09B9/00 ,  A63F13/00 ,  A63F13/06 ,  A63F13/12 ,  A63H33/00 ,  G09B5/06 ,  H04N5/765 ,  G09B3/00 ,  G09B5/00

CPC classification number: A63F13/235 ,  A63F13/005 ,  A63F13/06 ,  A63F13/214 ,  A63F13/28 ,  A63F13/54 ,  A63F3/00643 ,  G09B5/065 ,  A63F2300/1031 ,  A63F2300/1037 ,  A63F2300/1062 ,  A63F2300/1068 ,  A63F2300/302 ,  A63F3/00006

Abstract: An interactive apparatus for use with a computer, comprising a transceiver for two-way wireless communication with a plaything, the transceiver having terminals for connection to the computer, and a control device for causing the computer to send and receive information to and from the plaything via the transceiver to enable the plaything to provide interactive fantasy simulation of the behavior of a corresponding real-world object. In another aspect, the invention provides a method for enabling fantasy play using a computer and a plaything, comprising at the plaything, delivering output and receiving input associated with the fantasy play, and generating control signals at the computer for controlling the output based on the input, and by wireless communication sending the control signals from the computer to the plaything and sending the input from the plaything to the computer.

Abstract translation: 一种与计算机一起使用的交互式装置，包括用于与玩具进行双向无线通信的收发器，所述收发器具有用于连接到所述计算机的终端，以及控制装置，用于使所述计算机向所述玩具发送和接收信息 通过收发器使播放能够提供相应的真实世界对象的行为的交互式幻想模拟。 在另一方面，本发明提供了一种使用计算机和玩物进行幻想播放的方法，包括在播放中输出和接收与幻想播放有关的输入和接收输入，以及在计算机上产生控制信号，以基于 并且通过无线通信将控制信号从计算机发送到玩具，并将输入从玩物发送到计算机。

公开(公告)号：US5835297A

公开(公告)日：1998-11-10

申请号：US778389

申请日：1996-12-31

Applicant: Mark D. Moore ,  Bradley Alan Silen ,  Paul Beard

Inventor： Mark D. Moore ,  Bradley Alan Silen ,  Paul Beard

IPC: G11B19/10 ,  G11B15/18 ,  G11B3/90

CPC classification number: G11B19/10

Abstract: A method, apparatus and computer system for detecting the insertion of a medium in a medium drive, including applying energy to a drive motor of the medium drive; changing the state of a medium change signal, in response to the energy, to reflect the presence of a medium in the medium drive; and relaxing the energy before the drive motor turns.

Abstract translation: 一种用于检测介质驱动中的介质插入的方法，装置和计算机系统，包括向介质驱动器的驱动电机施加能量; 响应于能量改变介质变化信号的状态，以反映介质驱动中介质的存在; 并在驱动电机转动之前松开能量。

公开(公告)号：US5774736A

公开(公告)日：1998-06-30

申请号：US572794

申请日：1995-12-15

Applicant: Robert S. Wright ,  Kris P. Dehnel ,  Russell J. Wunderlich ,  Bassam N. Elkhoury

Inventor： Robert S. Wright ,  Kris P. Dehnel ,  Russell J. Wunderlich ,  Bassam N. Elkhoury

IPC: G06F11/20 ,  G06F1/10

CPC classification number: G06F11/2015

Abstract: The present invention relates to a fault tolerant system for providing power to a multiple central processing unit computer system. Three DC-DC converters, each sized for providing power to one central processing unit, furnish power to two central processing units through two power planes. Each DC-DC converter has an output voltage level selectable through a voltage identification signal. If the voltage identification signals of the converters match, identification logic couples the power planes together. If only one converter is available to power the two central processing units, a stopclock logic circuit alternatively places the central processing units in known stopclock modes. Thus, the single converter only has to fully power one central processing unit at any one time.

Abstract translation: 本发明涉及一种用于向多个中央处理单元计算机系统提供电力的容错系统。 三个DC-DC转换器，每个尺寸适于向一个中央处理单元提供电源，通过两个电源平面向两个中央处理单元提供电力。 每个DC-DC转换器具有可通过电压识别信号选择的输出电压电平。 如果转换器的电压识别信号匹配，识别逻辑将电源层耦合在一起。 如果只有一个转换器可用于为两个中央处理单元供电，则停止时钟逻辑电路交替地将中央处理单元置于已知的停止时钟模式。 因此，单个转换器只需要在任何一个时间完全为一个中央处理器供电。

公开(公告)号：US5768615A

公开(公告)日：1998-06-16

申请号：US565717

申请日：1995-11-30

Applicant: Robin T. Castell ,  G. Edward Newman ,  Lee W. Atkinson ,  Kevin W. Eyres ,  David J. Delisle

Inventor： Robin T. Castell ,  G. Edward Newman ,  Lee W. Atkinson ,  Kevin W. Eyres ,  David J. Delisle

IPC: G06F13/38 ,  G06F13/00

CPC classification number: G06F13/387

Abstract: A method and apparatus for increasing system functionality through a predefined interface is disclosed. Signal lines which are not used or which are not used in certain modes are connected to an interconnection device instead of being connected to an interface wherein the output of the interconnection device is connected to the interface where such lines would have been connected. The interconnection device also has a set of inputs for receiving signals from a device providing the desired functionality. A controller chooses between the two sets of inputs to control what signal lines are connected to the predefined interface. Accordingly, during certain modes of operation, the added functionality from a device whose output is being switched into the interface can be supported. In one embodiment, speaker phone capability is provided for even though the predefined PCMCIA interface does not support such capability. The disclosed design continues to maintain capability with all systems adapted to be used with such predefined interface.

Abstract translation: 公开了一种通过预定界面提高系统功能的方法和装置。 在某些模式下未使用或不使用的信号线连接到互连装置，而不是连接到其中互连装置的输出连接到这样的线路将被连接的接口的接口。 互连设备还具有用于从提供所需功能的设备接收信号的一组输入。 控制器在两组输入之间选择以控制什么信号线连接到预定接口。 因此，在某些操作模式下，可以支持从其输出被切换到接口的设备的附加功能。 在一个实施例中，即使预定义的PCMCIA接口不支持这种能力，也提供扬声器电话能力。 所公开的设计继续保持适于与这种预定接口一起使用的所有系统的能力。

公开(公告)号：US5523755A

公开(公告)日：1996-06-04

申请号：US149971

申请日：1993-11-10

Applicant: David R. Wooten

Inventor： David R. Wooten

IPC: H03M11/00 ,  H03K17/94

CPC classification number: H03M11/003

Abstract: A n-key rollover keyboard having an application specific integrated circuit (ASIC) with a large number of pins, each pin directly connected to a key contact, with the other side of the key contact connected to ground. The direct wire arrangement allows use of a single sided circuit board. The keyboard has a reduced cost over prior n-key rollover designs by allowing removal of the series diodes and double sided circuit board.

Abstract translation: 具有多个引脚的专用集成电路（ASIC）的n键翻转键盘，每个引脚直接连接到键触点，键触点的另一侧连接到地。 直接导线布置允许使用单面电路板。 通过允许去除串联二极管和双面电路板，键盘比以前的n键翻转设计具有更低的成本。