公开(公告)号：US09202158B2

公开(公告)日：2015-12-01

申请号：US14405216

申请日：2013-06-19

Applicant: ST-Ericsson SA

Inventor： Pablo Ignacio Gimeno Monge ,  Javier Del Prado Pavon ,  Nikhil Taluja

IPC: G06K19/06 ,  G06K19/07 ,  H02J9/06

CPC classification number: G06K19/0703 ,  G06K19/0702 ,  G06K19/0712 ,  G06K19/0715 ,  G06K19/0727 ,  H02J9/061

Abstract: There is described a method of, and a circuit for supplying power to an integrated circuit card, ICC, of a wireless device comprising a first power supply unit. The circuit comprises a power pin connected configured to selectively operate as a power input pin or as a power output pin, and adapted to be connected to the first power path of the device through a second power path of the device; a second power supply unit; and a controller configured to cause the power pin to operate as a power input pin in the first operation mode of the device, or as a power output pin in the second operation mode of the device. A wireless device comprising the circuit and a method of supplying power to an ICC are further disclosed.

Abstract translation: 描述了一种用于向包括第一电源单元的无线设备的集成电路卡ICC供电的方法和电路。 该电路包括被配置为选择性地操作为电源输入引脚或作为电源输出引脚的电源引脚，并且适于通过该器件的第二电源路径连接到器件的第一电源通路; 第二电源单元; 以及控制器，被配置为使得所述电源引脚在所述器件的第一操作模式下作为电源输入引脚工作，或者作为所述器件的第二操作模式中的电源输出引脚。 还公开了一种包括电路的无线设备和向ICC供电的方法。

公开(公告)号：US09172339B2

公开(公告)日：2015-10-27

申请号：US14136469

申请日：2013-12-20

Applicant: ST-Ericsson SA

Inventor： Vincent Binet ,  Emmanuel Allier ,  Francois Amiard

IPC: H03F3/217 ,  H03F1/02 ,  H03F3/72

CPC classification number: H03F3/2171 ,  H03F1/0277 ,  H03F3/2173 ,  H03F3/72 ,  H03F2203/7206 ,  H03F2203/7236

Abstract: There is disclosed a driver circuit for a power amplifier of class D type having a segmented architecture with at least one current branch which can be powered down in a low power mode of operation of the circuit. The branch comprising a switch with a cascode MOS transistor, the circuit further comprises a bias circuitry adapted for dynamically generating a dynamic bias control signal so as to cause the cascode MOS transistor of the switch to be ‘Off’ in the low power mode.

Abstract translation: 公开了一种用于D类功率放大器的驱动电路，该驱动电路具有分段结构，具有至少一个电流分支，该电流分支可在该电路的低功率工作模式下掉电。 所述分支包括具有共源共栅MOS晶体管的开关，所述电路还包括偏置电路，所述偏置电路适于动态产生动态偏置控制信号，以使所述开关的共源共栅MOS晶体管处于低功率模式中的“关”。

公开(公告)号：US20150303997A1

公开(公告)日：2015-10-22

申请号：US14438733

申请日：2013-11-20

Applicant: ST-Ericsson SA

Inventor： Achraf DHAYNI

IPC: H04B5/00 ,  G06K7/10

CPC classification number: H04B5/0062 ,  G06K7/10128 ,  G06K7/10237 ,  G06K7/10297

Abstract: The invention concerns a Near Field Communication method of detection of a tag presence by a tag reader, comprising: stimulating (S2) the transmitter of the reader so as to generate an impulse response of said transmitter, evaluating (S3) the generated impulse response of said transmitter, assessing (S4), from the evaluated impulse response of said transmitter, the presence (S5) or the absence (S6) of a tag.

Abstract translation: 本发明涉及一种用于检测标签读取器的标签存在的近场通信方法，包括：刺激（S2）读取器的发射器以产生所述发射机的脉冲响应，评估（S3）产生的脉冲响应 所述发射机根据所述发射机的评估脉冲响应，评估（S4）标签的存在（S5）或不存在（S6）。

公开(公告)号：US20150286491A1

公开(公告)日：2015-10-08

申请号：US14431890

申请日：2013-10-25

Applicant: ST-ERICSSON SA

Inventor： Andreas Anyuru

IPC: G06F9/455 ,  G06F9/45

CPC classification number: G06F9/4552 ,  G06F8/48

Abstract: A method in a Just-In-Time, JIT, compiler for compiling code in a JIT-compiler for a heterogeneous multiprocessor system is provided. The method comprises compiling a snippet of input code, whereby one or more compiled code snippets are generated for the snippet of input code. The one or more compiled code snippets are tagged with one or more snippet specific characteristics. One or more compiled code snippets are selected from the compiled code snippets, based on said snippet specific characteristics. The one or more selected compiled code snippets are executed on one or more of the plurality of processors. While executing, run-time data is gathered, where the gathered data is tagged for which processor in the heterogeneous multiprocessor system it is related to.

Abstract translation: 提供了一种用于异构多​​处理器系统的用于在JIT编译器中编译代码的Just-In-Time JIT编译器中的方法。 该方法包括编译输入代码段，由此为输入代码片段生成一个或多个已编译代码片段。 一个或多个编译的代码片段被标记为一个或多个片段特定的特征。 基于所述代码段特定的特征，从编译的代码片段中选择一个或多个编译的代码段。 一个或多个选择的编译代码片段在多个处理器中的一个或多个处理器上执行。 在执行时，收集运行时数据，其中收集的数据被标记为与其相关的异构多处理器系统中的哪个处理器。

公开(公告)号：US09154294B2

公开(公告)日：2015-10-06

申请号：US14375171

申请日：2013-02-01

Applicant: ST-Ericsson SA

Inventor： Gilles Ries ,  Abdelaziz Goulahsen

IPC: H04L7/04 ,  H04L7/00

CPC classification number: H04L7/042 ,  H04L7/0079 ,  H04L7/0083

Abstract: This invention concerns a resynchronization method by a receiver of a received stream of groups of bits, comprising: detecting a synchronization loss (S10), and then iterating (S11 to S17) checks over different bits until a first bit of a group of bits is found (S14), the most probable first bit being checked first, wherein the checks are iterated in a checking order of bits different from a chronological reception order, so as to check earlier at least one of most probable first bits, different from the most probable first bit, so as to shorten average resynchronization time.

Abstract translation: 本发明涉及接收机对接收到的一组比特流的再同步方法，包括：检测同步丢失（S10），然后迭代（S11至S17）检查不同的比特，直到一组比特的第一比特为 发现（S14），首先检查最可能的第一位，其中以与时间顺序的接收顺序不同的比特的检查顺序迭代检查，以便更早地检查与最多可能的第一位中的至少一个 可能的第一位，以缩短平均重新同步时间。

公开(公告)号：US20150270912A1

公开(公告)日：2015-09-24

申请号：US14433893

申请日：2013-11-07

Applicant: ST-ERICSSON SA

Inventor： Achraf Dhayni ,  Christophe Arnal

IPC: H04B17/20 ,  H04B5/00

CPC classification number: H04B17/20 ,  H04B5/0031 ,  H04B17/14 ,  H04B17/15 ,  H04B17/19 ,  H04B17/29 ,  H04B17/408 ,  H04L1/243

Abstract: A method of self-test for a near-field communication (NFC) radio frequency (RF) front-end unit comprising one antenna driver and at least one unit from a group comprising one reader and one card emulator, the RF front-end unit being connected to a digital front-end unit, wherein the antenna driver and the unit are interconnected through a first connection line via their respective first input-output interface and are also interconnected through a second connection line via their respective second input-output interface, the digital front-end unit being connected to the second connection line, the method comprising: activating the antenna driver and the unit based on control signals; generating a first signal onto the first connection line by modulating a respective first bitstream; retrieving a second bitstream from the second connection line, by demodulating the first signal; and, determining an outcome of the self-test by monitoring the demodulated signal.

Abstract translation: 一种用于近场通信（NFC）射频（RF）前端单元的自检的方法，包括一个天线驱动器和来自包括一个读取器和一个卡仿真器的组中的至少一个单元，所述RF前端单元 连接到数字前端单元，其中所述天线驱动器和所述单元经由其相应的第一输入 - 输出接口通过第一连接线互连，并且还经由其相应的第二输入 - 输出接口通过第二连接线互连， 所述数字前端单元连接到所述第二连接线，所述方法包括：基于控制信号激活所述天线驱动器和所述单元; 通过调制相应的第一位流产生第一信号到第一连接线上; 通过解调第一信号从第二连接线检索第二比特流; 以及通过监视解调信号来确定自检的结果。

公开(公告)号：US20150263755A1

公开(公告)日：2015-09-17

申请号：US14434142

申请日：2013-11-07

Applicant: ST-ERICSSON SA

Inventor： Pierangelo Confalonieri ,  Federico Guanziroli ,  Alberto Minuti

IPC: H03M1/46 ,  H03M1/10

CPC classification number: H03M1/468 ,  H03M1/1019 ,  H03M1/1023 ,  H03M1/46

Abstract: A new approach is disclosed concerning offset cancellation methods in analog to digital converters and analog to digital converters implementing the same. Such approach allows to efficiently cancel offset drifts in analog to digital converters.

Abstract translation: 公开了一种关于模数转换器和实现相同数字转换器的模数转换器的失调消除方法的新方法。 这种方法允许有效地消除模数转换器中的偏移漂移。

公开(公告)号：US20150256159A1

公开(公告)日：2015-09-10

申请号：US14438727

申请日：2013-11-15

Applicant: ST-ERICSSON SA

Inventor： Philippe Pignolo

IPC: H03K3/017 ,  H03K3/012

CPC classification number: H03K3/017 ,  H02M3/156 ,  H02M2003/1566 ,  H03K3/012

Abstract: A pulse width modulation controller (PWM) is disclosed which has a MOSFET (15) responsive to the error voltage (Verror) signal from the PWM amplifier (17) to detect a transient condition without delay ΔTd. The MOSFET drain generates and applies a detection signal (S) to a delaying circuit (D). The delaying circuit (D) is responsive to the transient detection signal (S) to asynchronously output two latch signals (S1) and (S2) which on application to respective latch circuits (L1, L2) cause a change in conduction state of PMOS (8) and NMOS (9). This arrangement reduces voltage undershoot.

Abstract translation: 公开了一种脉冲宽度调制控制器（PWM），其具有响应于来自PWM放大器（17）的误差电压（Verror）信号的MOSFET（15），以无延迟地检测瞬态状态和Dgr; Td。 MOSFET漏极产生并向延迟电路（D）施加检测信号（S）。 延迟电路（D）响应于瞬态检测信号（S）异步地输出两个锁存信号（S1）和（S2），在锁存信号（S1，L2）施加到各个锁存电路（L1，L2）导致PMOS导通状态 8）和NMOS（9）。 这种布置降低了电压下冲。

公开(公告)号：US20150249510A1

公开(公告)日：2015-09-03

申请号：US14426763

申请日：2013-09-12

Applicant: ST-ERICSSON SA

Inventor： Achraf Dhayni

IPC: H04B17/21 ,  H04W24/02 ,  H04W4/00

CPC classification number: H04B17/21 ,  G01R31/31716 ,  H04B5/0056 ,  H04B17/14 ,  H04B17/345 ,  H04W4/80 ,  H04W24/02

Abstract: A method of determining a calibration of a near field communication, NFC, device, the NFC device comprising a receiver circuit, a transmitter circuit and a load modulator circuit, the method comprising: generating a carrier signal in the transmitter circuit, generating a modulation signal in the load modulator circuit, generating a modulated carrier signal, comprising first and second frequencies, by applying the modulation signal to the carrier signal, applying the modulated carrier signal at an input of the receiver circuit, and determining a response parameter of the receiver circuit on the basis of the response of the receiver circuit to the first and second frequencies in the modulated carrier signal.

Abstract translation: 一种确定近场通信NFC装置的NFC装置的方法，所述NFC装置包括接收机电路，发射机电路和负载调制器电路，所述方法包括：在所述发射机电路中产生载波信号，产生调制信号 在所述负载调制器电路中，通过将所述调制信号施加到所述载波信号来产生包括第一和第二频率的调制载波信号，在所述接收机电路的输入处应用所述调制载波信号，以及确定所述接收机电路的响应参数 基于接收机电路对调制载波信号中的第一和第二频率的响应。

公开(公告)号：US20150242336A1

公开(公告)日：2015-08-27

申请号：US14423273

申请日：2013-09-16

Applicant: ST-Ericsson SA

Inventor： Chris Loreskär ,  Jens Wiklander

IPC: G06F12/14 ,  G06F7/58

CPC classification number: G06F12/1466 ,  G06F7/582 ,  G06F21/72 ,  G06F21/74 ,  G06F2212/1052

Abstract: Data, such as usage restriction data (3), are stored in a memory (2) of an electronic device (1). When new data (3) is determined, a number of previously stored random data files (4) are transferred to a secure execution environment (7), in which a number of further random data files and a random seed are generated. A series for selecting some previously stored data files and some further data files is created, and a checksum over the selected files is calculated. The random seed is stored with the data, and an authentication code thereof is calculated using the checksum. The updated data and the generated further data files are returned from said secure execution environment (7), and the further data files replace a corresponding number of the previously stored data files according to the created series. The updated data is stored in the memory (2).

Abstract translation: 诸如使用限制数据（3）的数据被存储在电子设备（1）的存储器（2）中。 当确定新数据（3）时，先前存储的多个随机数据文件（4）被传送到其中产生多个随机数据文件和随机种子的安全执行环境（7）。 创建一系列用于选择一些以前存储的数据文件和一些其他数据文件，并计算所选文件的校验和。 随机种子与数据一起存储，并且使用校验和计算其认证码。 从所述安全执行环境（7）返回更新的数据和所生成的其他数据文件，并且根据所创建的系列，进一步的数据文件替换相应数量的先前存储的数据文件。 更新的数据被存储在存储器（2）中。